A 500-MHz high-speed, low-power ternary CAM design using selective match line sense amplifier in 65nm CMOS

Nagakarthik, T.; Choi, Jeong Ryeol

doi:10.1109/iacs.2015.7103202

Cited by 4 publications

(3 citation statements)

References 8 publications

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“…This work has been supported in part by the European Commission through the FP7-ICT-FET Open project RAMPLAS (Contract No. 207773) been shown in [7], while 484ps access times and 1.25 Gs/s operation cycles have been reported by using Fin-FET binary CAM cells [8]. A Magnetic Tunnel Junction (MTJ)-based TCAM cell has been proposed in [9] with a worst-case sense delay of 263ps and write time of 4ns.…”

Section: Introductionmentioning

confidence: 99%

An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

Pitris

Vagionas

Maniotis

et al. 2016

IEEE Photon. Technol. Lett.

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Section: Introductionmentioning

confidence: 99%

An Optical Content Addressable Memory Cell for Address Look-Up at 10 Gb/s

Pitris

Vagionas

Maniotis

et al. 2016

IEEE Photon. Technol. Lett.

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“…It is worth noting that electronic RAMs have achieved a maximum speed of up to 5.3 GHz, when built on 65 nm CMOS and optimized for high performance [43], showing a trend towards slowing down and giving up their fast access time at speed of 1 GHz or even below, to benefit from lower energy consumption in the order of a few fJ/bit or less [47]. A similar trend is also observed for electronic CAMs, where performance is typically limited in the order of 500 MHz [51] and reaches the 1 GHz operation only by using pattern dependent predict-and-correct schemes, while also occupying energy consumptions in the order of 1 fJ bit −1 [50,52].…”

Section: Discussion and Future Challengesmentioning

confidence: 58%

“…However, as in all these optical RAM cell demonstrations, the optical AGs have been mainly implemented as simple, unoptimized wavelength converters (WCs) [25][26][27][28][29][30][31], not tailored specifically for RAM operation, leaving room for further improvements in terms of high-speed operation. As a result, optical RAM cell demonstrations have so far exhibited speed capabilities only up to 5 Gb s −1 [25,27] not managing to outperform the performance of state-of-the-art electronics RAMs [43][44][45][46][47][48][49][50][51][52][53]. Still, in order to efficiently minimize the disparity between slow AL and continuously increasing optical transmission line rates, the development of optical CAMs is also required in order to synergize with fast optical RAM circuits towards enabling light-based AL tables with high-speed capabilities of 10 Gb s −1 and beyond.In this communication we present our vision and the latest progress on both functional elements, i.e.…”

mentioning

confidence: 99%

Optical memory architectures for fast routing address look-up (AL) table operation

et al. 2019

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Today, the increasing demand for fast routing processes has turned the address look-up (AL) operation into one of the main critical performance operations in modern optical networks, since it conventionally relies on slow-performing AL tables. Specifically, AL memory tables are comprised of content addressable memories (CAMs) for storing a known route of the forwarding information base of the router, and random access memories (RAMs) for storing the respective output port for this route. They thus allow for a one-cycle search operation of a packet's destination address, yet they typically operate at speeds well below 1 GHz, in contrast with the vastly increasing optical line rates. In this paper, we present our overall vision towards light-based optical AL memory functionalities that may facilitate faster router AL operations, as the means to replace slow-performing electronic counterparts. In order to achieve this, we report on the development of a novel optical RAM cell architecture that performs for the first time with a speed of up to 10 Gb s −1 , as well as our latest works on multi-bit 10 Gb s −1 optical CAM cell architectures. Specifically, the proposed optical RAM cell exploits a semiconductor optical amplifier-Mach-Zehnder interferometer in a push-pull configuration and deep saturation regime, doubling the speed of prior optical RAM cell configurations. Errorfree write/read operation is demonstrated with a peak power penalty of 6.2 dB and 0.4 dB, respectively. Next, we present the recent progress on optical CAM cell architectures, starting with an experimental demonstration of a 2-bit optical CAM match-line architecture that achieves an exact bitwise search operation of an incoming 2-bit destination address at 10 Gb s −1 , while the analysis is also extended to a numerical evaluation of a multi-cell 4-bit CAM-based row architecture with wavelength division multiplexed outputs for fast parallel memory operations at speeds of up to 4×20 Gb s −1 . Finally, we present a comparative study between electronic and optical RAMs and CAMs in terms of energy and speed and discuss the further challenges towards our vision. entries, even causing the depletion of the remaining IPv4 address space and leading to the advent of an IPv6 protocol with a quadrupled need for address look-up (AL) requirements [5]. This increasing need for faster routing functionalities, including AL, which also requires fast hardware memories to perform fast look-up of the packet's destination address immediately upon its arrival and across the forwarding information base (FIB) of the router.On the path to speeding up hardware memory and lower latency times when fetching data, state-of-the-art highly performing electronic static random access memory (RAM) cell technology has managed to achieve operation up to 5 GHz [6][7][8]. However, RAMs are inherently limited in fast AL as, owing to the address-based fetching of data, they would require multiple sequential random access to the memory and consecutive searches of the desired content. As a re...

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