A 54.4–90 GHz Low-Noise Amplifier in 65-nm CMOS

Self Cite

A V-band low-noise amplifier (LNA) employing a Gm-boosting technique is presented in this paper. With the transformers, which are applied between the adjacent stages, the transconductances of the following transistors are boosted. Thus, the gain of the circuit is effectively enhanced. The noise figure (NF) is also decreased with the technique. Utilizing a commercial 65-nm CMOS technology, the LNA is demonstrated. The measurement results show that the LNA achieves a maximum gain of 17.4 dB at 57.1 GHz with 10.9-GHz 3-dB gain bandwidth. The measured NF of the LNA is from 3.95 dB to 4.6 dB at 53 to 64 GHz. The tested input 1-dB gain compression point (IP 1dB ) is −14.2 dBm at 57 GHz. The DC power consumption is only 10 mW with 1-V power supply. The chip area is only 0.255 mm 2 with all testing pads.

Section: Noise Figurementioning

confidence: 63%

“…Parallel coils are added to the secondary windings to compensate the coupling coefficient of the transformers. 6 The inductors L 1 , L 2 , L 3 , and the capacitor C 1 are used to realize the input impedance matching network. The output impedance matching network is constituted by L 4 , L 5 , and C 4 .…”

Section: Circuit Designmentioning

confidence: 99%

A 10‐mW 3.9‐dB NF transformer‐based V‐band low‐noise amplifier in 65‐nm CMOS

Zhao

et al. 2019

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“…[1][2][3] On-chip spiral inductors play a critical role in RF and mm-wave IC designs, such as power amplifiers (PAs), low-noise amplifiers (LNAs), mixers, voltagecontrolled oscillators (VCOs), filters, and impedance matching networks. [4][5][6][7][8] Owing to the low cost and easy to be integrated, [9][10][11] the CMOS on-chip inductors are widely used. Especially with the operating frequency increasing, mm-wave CMOS on-chip inductors are becoming more and more popular.…”

Section: Introductionmentioning

confidence: 99%

An improved wideband equivalent circuit model for integrated spiral inductors in CMOS technology

Zhao

Liu

et al. 2019

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This paper presents an improved wideband single-π model for on-chip spiral inductors based on the independent tested ground PADs (ITGPs). For the ITGP, the input and output ground PADs are not connected together that introduces potential difference between the input and output ground PADs.However, the conventional inductor models are suitable for the ground PADs being connected together; they usually ignore the input and output potential difference and failed to achieve high model accuracy for the ITGP structure.To develop an accurate model for ITGP, the potential difference between input and output ground PADs is analyzed in this paper, and then the lumpedparameter resistor-capacitor network is used to characterize it. To validate the proposed model, the test structures were fabricated by 0.18-μm CMOS technology and measured up to 67 GHz. Compared with the conventional model, the calculation results of the proposed model agree the measurement results better. Furthermore, the root mean square errors (RMSEs) of proposed model are less than 0.025.

“…Millimeter-wave (mm-wave) communications have attained extensive attention in last 10 years. [1][2][3] Currently, the fifth-generation (5G) communication aims at the mm-wave bands to meet the rapid growth of high-speed wireless data traffic. According to the Federal Communications Commission (FCC), the 28 GHz and 38 GHz are two important candidate frequency bands for 5G mm-wave applications.…”

Section: Introductionmentioning

confidence: 99%

A 27.5‐43.5 GHz 65‐nm CMOS up‐conversion mixer with 0.42 dBm OP_1dB for 5G applications

Chen

Liu

Jiang

et al. 2019

Self Cite

A 27.5-to 43.5-GHz up-conversion mixer is presented for fifth-generation (5G) applications in 65-nm CMOS process. A two-path transconductance stage (TPTS) is demonstrated to improve the linearity. Compared with the conventional common-source stage, this method enhances the output 1-dB compression point (OP 1dB ) by 3.45 dB only at a cost of 1-mW extra power. Moreover, the input and output baluns are using the fourth-order transformer-based resonators to realize a wideband impendence matching. With a power consumption of 14 mW, the proposed up-conversion mixer achieves OP 1dB of 0.42 dBm at 38 GHz. Simultaneously, the maximum conversion gain of −5 dB, local oscillator (LO)-to-intermediate frequency (IF) isolation of 43 dB and LO-to-radio frequency (RF) isolation of 40 dB are obtained.This paper presents a wideband high linearity up-conversion mixer for 5G applications in 65-nm CMOS process. A TPTS technique and fourth-order transformer-based resonators are analyzed and employed to improve the linearity and bandwidth of this mixer. Measurement results show the mixer achieves an OP 1dB of 0.42 dBm at 38 GHz, while consuming only 14 mW from a 1-V supply. Furthermore, it also demonstrates a large bandwidth from 27.5 to 43.5 GHz, which is suitable for the 5G applications including 28 and 38 GHz frequency bands. 8 of 9 CHEN ET AL. 8 of 9 CHEN ET AL. How to cite this article: Chen Z, Liu Z, Jiang Z, et al. A 27.5-43.5 GHz 65-nm CMOS up-conversion mixer with 0.42 dBm OP 1dB for 5G applications. Int J Numer Model. 2019;e2550. https://doi.org/10.1002/jnm.2550 CHEN ET AL. 9 of 9 0.42 dBm OP 1dB for 5G applications. Int J Numer Model. 2020;33:e2550. https://doi.