DOI: 10.22215/etd/2019-13657
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A 5GHz Passively Interpolated 5-Bit Time-to-Digital Converter with 8ps Resolution in IBM 130nm CMOS

Abstract: This work demonstrates the development of a 5-bit time to digital converter (TDC) using the local passive interpolation (LPI) technique. The TDC architecture achieves a high resolution, while maintaining a low conversion latency, and a good linearity over process variation at multi-GHz rate of operation, which simplifies the calibration process. The time-to-digital converter was fabricated in a 0.13 µm IBM CMOS process (CMRF8SF). At a sampling rate of 100 MHz the maximum frequency of operation was measured to … Show more

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