A 6-mW, 70.1-dB SNDR, and 20-MHz BW Continuous-Time Sigma-Delta Modulator Using Low-Noise High-Linearity Feedback DAC

Cho, Je-Kwang; Woo, Sunsik

doi:10.1109/tvlsi.2017.2651055

Cited by 11 publications

(6 citation statements)

References 17 publications

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“…For example, any undesirable effect due to thermal-noise, clock-jitter, or mismatching of current-cells in iDAC 1 will be directly forwarded to the output of modulator without attenuation. [1][2][3][4] Same results are expected for thermal noise of R 1 and OTA 1 . Also, nonlinearity at first operational-transconductanceamplifier (OTA) is a major issue that affects the performance of whole modulator.…”

Section: Introductionmentioning

confidence: 88%

“…[1][2][3][4] However, as an estimation, the SR at the negative output (out-) of FFC-OTA when a large negative input is applied to the in-is about −I 2 /C L where I 2 is the DC current of second stage and C L is the output capacitance. [1][2][3][4] However, as an estimation, the SR at the negative output (out-) of FFC-OTA when a large negative input is applied to the in-is about −I 2 /C L where I 2 is the DC current of second stage and C L is the output capacitance.…”

Section: Circuit Design Of a Ffc-ota For First Integratormentioning

confidence: 99%

“…where g m4 is the transconductance of M 4 . Simulations show that the in-band (ie, from 0 to 20 MHz) input referred rms noise of Figure 15A is less than 10 μV.…”

Section: Circuit Design Of a Ffc-ota For First Integratormentioning

confidence: 99%

“…In CT-ΔΣ modulators, because the feedback DACs are multi-bits and the input signal is continuous, then the signal swing at the output of integrators are almost continuous; therefore, the slew behavior of OTAs are not a matter of concern. [1][2][3][4] However, as an estimation, the SR at the negative output (out-) of FFC-OTA when a large negative input is applied to the in-is about −I 2 /C L where I 2 is the DC current of second stage and C L is the output capacitance. In this case, depending on the DC current of first stage (I 1 ) and the bias voltages as well as the sizes of M 3 , M 4 , and M 7 , the SR at out+ may exceed +I 2 /C L .…”

Section: Circuit Design Of a Ffc-ota For First Integratormentioning

confidence: 99%

“…Mohammad Reza Hasanzadeh http://orcid.org/0000-0003-0071-8824 Adib Abrishamifar http://orcid.org/0000-0001-6117-8839 where ω p2 , ω z1 , and ω z2 are as stated by Equation 4 and ω M is as follows:…”

Section: Orcidmentioning

confidence: 99%

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A novel OTA compensation approach suitable for CT‐ΔΣ modulators

Hasanzadeh

Abrishamifar

2018

Circuit Theory & Apps

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In this paper, a frequency-compensation approach to improve the phase margin of CMOS operational-transconductance-amplifiers (OTAs) is discussed particularly for use in continuous-time delta-sigma modulators (CT-ΔΣMs). The proposed method benefits a simple RC compensation network to provide one-dominant pole amplifier while its linearity is improved, too. Analytical and mathematical calculations are developed at macromodel and circuit level to prove the advantage of proposed method to conventional compensation topologies. Using TSMC-0.18 μm CMOS process, the behaviors of some OTAs are analyzed in a case study, 20-MHz bandwidth third-order CT-ΔΣ modulator. Simulations show that using proposed OTA, significant improvement is achieved in the signal-to-noise-and-distortion-ratio compared with the same modulator that employs other types of frequency compensation for its amplifiers.

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Section: Introductionmentioning

confidence: 88%

Section: Circuit Design Of a Ffc-ota For First Integratormentioning

confidence: 99%

“…where g m4 is the transconductance of M 4 . Simulations show that the in-band (ie, from 0 to 20 MHz) input referred rms noise of Figure 15A is less than 10 μV.…”

Section: Circuit Design Of a Ffc-ota For First Integratormentioning

confidence: 99%