We present design considerations for programmable high-frequency continuous-time filters implemented in standard digital CMOS processes. To reduce area, accumulation MOS capacitors are used as integrating elements. The filter design problem is examined from the viewpoint of programmability. To allow frequency scalability without deterioration of noise performance and of the frequency response shape, we employ a technique called "constant-capacitance scaling," which assures that even parasitic capacitances remain invariant when transconductors are switched in and out of the filter. This technique is applied to the design of a programmable fourth-order Butterworth continuous-time filter with a bandwidth programmable from 60 to 350 MHz implemented in a 0.25-m digital CMOS process. The filter has a dynamic range of 54 dB, dissipates 70 mW from a 3.3-V supply, and occupies an area of 0.15 mm 2 .
Abstract-Recent innovations in software defined CMOS radio transceiver architectures heavily rely on high linearity switched-RC sampler and passive-mixer circuits, driven by digitally programmable multi-phase clocks. Although seemingly simple circuits, the frequency domain analysis of these Linear Periodically Time Variant (LPTV) circuits is often deceptively complex. This paper uses the properties of sampled LPTV systems and the adjoint (inter-reciprocal) network to greatly simplify the analysis of the switched-RC circuit. We first derive the transfer function of the equivalent linear time-invariant filter relating the input to the voltage sampled on the capacitor in the switched-RC kernel. We show how a leakage resistor across the capacitor can easily be addressed using our technique. A signal-flow graph is then developed for the complete continuous-time voltage waveform across the capacitor, and simplified for various operating regions. We finally derive the noise properties of the kernel. The results we derive have largely been reported in prior works, but the use of the adjoint network simplifies the derivation, while also providing circuit insight.
We present a simple, intuitive technique to compensate the loop filter transfer function for excess delay in low-pass continuous-time 16modulators.Conventionalmethodsoffinding the appropriate filter coefficients to account for loop delay work in the -domain, leading to cumbersome algebra. We show that the same objective can be accomplished entirely in the continuous-time domain, resulting in a procedure that lends itself to hand calculations, even for high order modulators. We derive closed-form expressions for the loop filter coefficients in modulators using nonreturn-to-zero and return-to-zero digital-to-analog converters. Simulation results confirming the theory are given.
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