A 6800-$\mu$ m² Resistor-Based Temperature Sensor With ±0.35 °C (3$\sigma$ ) Inaccuracy in 180-nm CMOS

Abstract

This paper describes a compact resistor-based temperature sensor that has been realized in a 180nm CMOS process. It occupies only 6800µm², thanks to the use of a highlydigital VCO-based phase domain sigma-delta modulator, whose loop filter consists of a compact digital counter. Despite its small size, the sensor achieves ±0.35°C (3σ) inaccuracy from-35°C to 125°C. Furthermore, it achieves 0.12°C (1σ) resolution at 2.8 kSa/s, which is mainly limited by the time-domain quantization imposed by the counter.

5.3 A Highly Digital 2210μm2 Resistor-Based Temperature Sensor with a 1-Point Trimmed Inaccuracy of ± 1.3 ° C (3 σ) from -55 ° C to 125 ° C in 65nm CMOS

“…Its two key architectural innovations are 1) the use of dual gatedring-oscillators (GROs) to shape the counter's time-domain Q-noise, and 2) their operation at a fixed frequency, which enables linear phase detection. Compared to previous PDΔΣM-based designs [3,4], the sensor achieves ~10× more resolution (12.8mK resolution in a 1ms conversion time), while consuming ~50× less power (28W). Furthermore, compared to previous FLL-based designs [1,2], it achieves similar inaccuracy (±1.3°C (3σ), 1-pt trim), but over the full military temperature range (-55°C to 125°C).…”

“…Alternatively, an RC filter can be driven at a constant frequency and the resulting temperature-dependent phase-shift can then be digitized by a highly digital phase-domain delta-sigma modulator (PDΔΣM), as shown in Fig. 5.3.1 (right) [3]. A current-controlled oscillator (CCO) converts the filter's output into a frequency-modulated square-wave that can be integrated by a counter.…”

“…The modulator's phase summation node is then realized by using the output of its phase DAC to control the counter's up/down action. The sensor occupies 6800µm² in 0.18µm CMOS [3], and can be made much smaller in 40nm [4]. However, the CCO's non-linear current-to-frequency characteristic limits the sensor's inaccuracy to ±2.7°C (3σ) from -35°C to 125°C after a 1-point trim.…”

“…In this work, the single CCO and the up/down counter of [3,4] are replaced by dual GRO/counter pairs, one for counting "up" and the other for counting "down". Their outputs are then digitally subtracted to generate the final integrated result.…”

“…5.3.2, the fractional phases of each oscillator can be preserved by disconnecting their supply currents, which disables their inverters but preserves their output states [5]. The resulting GROs can be operated at 50MHz, compared to the 800MHz in [3,4], drastically reducing the counters' power dissipation. When driven by a square-wave Fdrive, the zero-crossings of the PPF's output exhibit a temperature-dependent phase-shift, which can readily be digitized by a comparator, similar to the one in [2].…”