A 70‐MHz, 32‐bit BiCMOS processor has been developed. This paper describes the architecture and the high‐speed technology, mainly the arithmetic unit, of the very‐high‐speed BiCMOS processor. This processor includes a 32‐bit ALU, register file with four ports, arithmetic unit composed of ±32‐bit barrel shifter and so on, ROM storing microprograms, memory management unit, cache controller, and clock generator. The chip integrates 529,000 transistors (including bipolar transistors of 1.5 percent) within 12.98 mm × 12.98 mm chip. The BiCMOS circuit technology is applied to the register file, arithmetic circuit, clock generator, and so on, to achieve the 70‐MHz BiCMOS processor under typical conditions. Thus, the effectiveness of employing the BiCMOS technology for very‐high‐speed digital LSIs, such as microprocessors, has been verified.