The experimenta l investigatio n of a centrifugal compressor is carried out to improve HCFC123 compression performance . A CFCll compressor applying HCFC123 shows a lowered adiabatic head rise, efficiency, and volume flow. Another CFC!l compressor with HCFC123 and a modified impeller shows a result comparable to the CFCll compression case. A tandem impeller is designed to cover the volume flow increase for HCFC1Z3. The performance of this impeller is sufficient to absorb the volume flow increase and additionally some efficiency improvement is obtained.

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A novel architectural extension, in which floatingpoint dara are t r&med directly from main memory to floating-point registers, has been successfully implemented in a superscalar RISC processor. This extension allows main memory access throughput of I .2 Gbytels, and efective perjonnance reaches 267 MFLOPS (89% of the peakpei$omce) for typical floating-point applications. The processor utilizes 0.3-micron 4-level metal CMOS technology with 2.5 V power supply and contains 3.9 million transistors in 15.7 mm x 15.7 mm die size. Only 4.5% of the die area is used for the extension. Pipeline stage optimization and swreboardbased dependency check method allow the extension to be realized without affecting the operating frequency.

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