A 79.2-μW 19.5-kHz-BW 94.8-dB-SNDR Fully Dynamic DT ΔΣ ADC Using CLS-Assisted FIA With Sampling Noise Cancellation

Matsuoka, Akira; Kumano, Yo; Nezuka, Tomohiro; Furuta, Yoshikazu; Iizuka, Tetsuya

doi:10.1109/tcsii.2023.3255866

Cited by 2 publications

(1 citation statement)

References 17 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The FIA, functioning as a full dynamic OTA, is an energy-efficient structure that avoids static current consumption during the bias phase. Additionally, its capacitor-powered mechanism eliminates the requirement for additional common-mode feedback circuitry [ 15 , 16 ]. To compensate for the FIA’s insufficient gain, the high-gain cascade FIA [ 17 , 18 ] structure was proposed.…”

Section: Introductionmentioning

confidence: 99%

A 90.9 dB SNDR 95.3 dB DR Audio Delta–Sigma Modulator with FIA-Assisted OTA

Huang,

Wei,

Wei

2024

Sensors

View full text Add to dashboard Cite

This paper presents a low-power, high-gain integrator design that uses a cascode operational transconductance amplifier (OTA) with floating inverter–amplifier (FIA) assistance. Compared to a traditional cascode, the proposed integrator can achieve a gain of 80 dB, while reducing power consumption by 30%. Upon completing the analysis, the value of the FIA drive capacitor and clock scheme for the FIA-assisted OTA were obtained. To enhance the dynamic range (DR) and mitigate quantization noise, a tri-level quantizer was employed. The design of the feedback digital-to-analog converter (DAC) was simplified, as it does not use additional mismatch shaping techniques. A third-order, discrete-time delta–sigma modulator was designed and fabricated in a 0.18 μm complementary metal-oxide semiconductor (CMOS) process. It operated on a 1.8 V supply, consuming 221 µW with a 24 kHz bandwidth. The measured SNDR and DR were 90.9 dB and 95.3 dB, respectively.

show abstract

Section: Introductionmentioning

confidence: 99%