A Background Correlation-Based Timing Skew Estimation Method for Time-Interleaved ADCs

Abstract

This paper presents a correlation-based all-digital background estimation method for timing skew mismatches in time-interleaved analog-to-digital converters (TI-ADCs). Exploiting the first-order approximation of an autocorrelation function of the digital output of each Sub-ADC, the timing skew mismatch between adjacent channels is identified, which can be used for analog or digital correction methods. The proposed estimation method has a low computation complexity and a simple implementation structure, because it basically only requires multiply-accumulate and average operations. In addition, the proposed method is not limited in the number of channels, does not need any pilot injection, is basically suitable for any bandlimited analog input signal, possess a large estimation range of mismatches and is immune against gain and offset mismatches to a certain extent. Simulation results of a four-channel TI-ADC behavioral model and measurement results from a commercial 12-bit 3.6-GS/s TI-ADC show the effectiveness and superiority of the proposed estimation method. INDEX TERMS Time-interleaved, ADC, timing skew, background calibration, correlation-based, estimation.

A Novel Fully Digital Feedforward Background Calibration Technique for Timing Mismatch in M-Channel Time-Interleaved ADCs

“…where R x (T s ) is the derivative of the autocorrelation of the input signal. To solve the potential stability issues in the feedback architecture [18,20,[23][24][25][26], we propose a novel feedforward estimation algorithm to directly calculate the value of timing mismatches. Firstly, to eliminate R x (T s ), the timing-skew error function can be written as…”

“…Many fully digital calibration techniques have been proposed in previous research [18][19][20][21][22][23][24][25][26]. In Ref.…”

“…[21], based on the frequency-shifted and derived basis functions, a calibration method for time-skew errors needs the Hilbert filter to reconstruct the complex signal, resulting in the additional consumption of hardware resources. Furthermore, the feedback architecture [18,20,[23][24][25][26] is utilized to make their estimated parameters close to the actual value, but this also brings potential stability issues. To address the aforementioned concerns, we put forward a novel, fully digital calibration technique.…”

An Enhanced Photonic-Assisted Sampling Approach for Spectrum-Sparse Signal by Compressed Sensing

“…However, it is challenging for a single ADC to achieve several tens of gigahertz sampling rates due to the inherent bandwidth bottleneck associated with electronic techniques [5][6]. Time-interleaved ADC architecture is a well-known sampling method to overcome the bottleneck of high-speed ADCs [7][8][9]. Different sampling clocks have the same sampling rates and equally-spaced phases in this system.…”

A Novel Time Delay Estimation and Calibration Method of TI-ADC Based on a Coherent Optical Communication System

“…In many optical communication infrastructures, in order to meet the broader bandwidth requirements, the sampling frequency and the bandwidth of ADC need to be continuously improved. Researchers have proposed a time-interleaved sampling scheme; the parallel sampling scheme increases the sampling rate to N times that of a single ADC [1][2][3][4][5][6].…”