2022
DOI: 10.1109/access.2022.3156890
|View full text |Cite
|
Sign up to set email alerts
|

A Biasing Approach to Design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs

Abstract: Date of publication xxxx 00, 0000, date of current version xxxx 00, 0000.

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
20
0

Year Published

2022
2022
2024
2024

Publication Types

Select...
5

Relationship

3
2

Authors

Journals

citations
Cited by 14 publications
(20 citation statements)
references
References 42 publications
0
20
0
Order By: Relevance
“…The same kind of differential to single-ended conversion is needed also in inverter-based or standard-cell-based OTAs exhibiting a differential input and a single-ended output. In recent research works dealing with inverter-based analog circuits such as [6], [7], [11], [29], [30], the differential to single-ended conversion is often performed exploiting the circuit topology depicted in Fig. 1.…”
Section: Review Of the Conventional Inverter-based D2s Convertermentioning
confidence: 99%
See 4 more Smart Citations
“…The same kind of differential to single-ended conversion is needed also in inverter-based or standard-cell-based OTAs exhibiting a differential input and a single-ended output. In recent research works dealing with inverter-based analog circuits such as [6], [7], [11], [29], [30], the differential to single-ended conversion is often performed exploiting the circuit topology depicted in Fig. 1.…”
Section: Review Of the Conventional Inverter-based D2s Convertermentioning
confidence: 99%
“…The Verilog netlist has been imported in the Cadence Innovus environment, together with all the technology files needed in the conventional place and route flow usually adopted for digital circuits. A conventional place and route flow (without timing constraints) including design import, floorplanning, place, and routing has then been carried out exploiting the same scripts conventionally adopted to implement digital circuits as in [29]. The automatically generated layout is depicted in Fig.…”
Section: Scalable Performance Under Supply Voltage Variationsmentioning
confidence: 99%
See 3 more Smart Citations