A Bluetooth radio in 0.18-/spl mu/m CMOS

A low-power highly digitized receiver for 2.4-GHz-band GFSK applications

“…The supply voltage for the analog part is 1.8 V, whereas the digital supply voltage is 1.4 V. The total power consumption is 31.7 mW in continuous mode. This is at least a factor of two lower than for other reported CMOS receivers with identical functionality [1]- [5].…”

“…The structure consists of integrator stages in series, followed by a decimation down-sampling of the signal by a factor of , followed by differentiation stages in series. The transfer function of this filter is given by (1) where and have been chosen in the design. These parameters have been chosen such that a reasonable over-sampling factor of eight of the signal is maintained, a high suppression of the aliasing frequency is achieved, and the deformation of the passband remains small.…”

“…Several transceivers realized in CMOS and aimed at Bluetooth/Gaussian frequency-shift keying (GFSK) applications have been reported in the literature [1]- [5]. Most referenced transceivers have been realized in 0.18-m CMOS, whereas the Bluetooth receiver revealed in [5] has been realized in 0.13-m CMOS.…”

“…All cited references report power consumptions for the receiver part of over 60 mW. Most receiver architectures use a limiter, after which demodulation takes place based on zero-crossing detection [1], [3], [4]. Although suitable for GFSK applications, the disadvantage of such nonlinear receivers is that the concept is not applicable to nonconstant envelope modulation.…”

Accurate Temperature Drift model of MOSFETs Mobility for Analog Circuits

“…To realize many functions on a chip, these integration technologies are aggressively applied. Consequently, the complex system that had been configured by many chips in the past is realized on a single chip [1] [2]. This chip is, in general, called as "System on a Chip (SoC)".…”