A Broadband and Equivalent-Circuit Model for Millimeter-Wave On-Chip M:N Six-Port Transformers and Baluns

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This paper presents a two-stage low noise amplifier (LNA) for 24 GHz automotive radar applications. Compared with traditional common source (CS) stage, the neutralized topology is used to improve the gain and reverse isolation in the first stage. In the second stage, an enhanced neutralized technique is adopted to improve the gain further. The LNA is fabricated by using standard 180-nm CMOS technology and occupies a chip area of 1.0 × 0.8 mm 2. The design realizes a gain of 19.8 dB, a noise figure (NF) of 4.7 dB and an input 1 dB compression point (IP 1dB) of −12 dBm.

Section: Circuit Designmentioning

confidence: 99%

A 24 GHz enhanced neutralized cascode LNA with 4.7 dB NF and 19.8 dB gain

Jiang

Liu

et al. 2018

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“…Therefore, a circuit model with the capability to mimic the frequency behavior of the actual inductor is required. In previous papers, a RL ladder structure is proved to be an effective way to capture the frequency behavior of inductor, and also transformer [2,3]. However, as for a RL ladder, there is no explicit component that can be viewed as dc inductance, and each inductance component is larger than dc inductance.…”

Section: Device Structure and Circuit Modelmentioning

confidence: 99%

“…However, because of their complexity and diversity, the modeling of multilayer transformers is not that easy. In [3], a lumped model was proposed for stacked transformer, which may not applicable to the other multilayer transformers. In [4], a distributed model was proposed for symmetric multilayer transformers.…”

Section: Introductionmentioning

confidence: 99%

An equivalent lumped circuit model for on-chip helical transformers

Zou

Di-ping

et al. 2018

This paper presents a compact equivalent lumped circuit model for on-chip helical transformers. From fundamental model, a simple coupled RL loop is added to account for the skin and proximity effect, and a series RLC branch is added to account for the parasitic coupling effects between inductors. Several helical transformers with various design configurations were fabricated using a standard 0.18 µm 1P6M CMOS process. It's demonstrated that the proposed model shows good accuracy over two times selfresonance frequency, which is essential for the design of high-speed and radio-frequency circuit.

“…The equivalent circuit of the output matching network is shown in Fig. 5(a) [7,8]. The L-C resonate unit works as a capacitor (C short ) at the fundamental frequency and is parallel with the parasitic capacitor of the pad (C PAD ).…”

Section: V-band High Efficiency Cmos Pamentioning

confidence: 99%

A wideband high efficiency V-band 65 nm CMOS power amplifier with neutralization and harmonic controlling

Chen

Jiang

Zhao

et al. 2017

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A wideband high-efficiency V-band CMOS power amplifier (PA) is proposed in this paper. Neutralization technique is used to reduce the Miller effect and improve the power gain. A wideband on-chip transformer is used to adjust the transistors' voltage waveform to improve the PAE performance. The PA works from 51 GHz to 64 GHz with 13 GHz absolute bandwidth and 22.6% relative bandwidth. The output power reaches 14.9 dBm with 16.3% peak PAE. The circuit is designed in a 65 nm CMOS technology.