A Broadband CMOS Frequency Tripler Using a Third-Harmonic Enhanced Technique

Zheng, You; Saavedra, Carlos E.

doi:10.1109/jssc.2007.905238

Cited by 23 publications

(5 citation statements)

References 29 publications

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“…In previous studies, triplers using diodes or transistors with compatible process of monolithic microwave integrated circuits (MMICs) [2][3][4][5][6][7] were frequently demonstrated. The commonly used techniques to generate the third harmonic include antiparallel diode pair [2,3] and overdriven transistor [4,5], which requires strong filtering process to remove unwanted harmonics.…”

Section: Introductionmentioning

confidence: 99%

“…The commonly used techniques to generate the third harmonic include antiparallel diode pair [2,3] and overdriven transistor [4,5], which requires strong filtering process to remove unwanted harmonics. Some other techniques such as waveform shaping techniques [6], subharmonic mixers [7], and left-handed nonlinear transmission lines [8] were also utilized. When it comes to broad bandwidth and stability, however, the antiparallel diode (Schottky-barrier diode) triplers [2,3], particularly passive diode triplers [3], have been well known for their integrated characteristics of broad bandwidth as compared with transistor [4,5] and varactor triplers [8].…”

Section: Introductionmentioning

confidence: 99%

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Compact Wideband Antiparallel Diode Frequency Triplers Utilizing Planar Transitions

Mohyuddin

Kim

Choi

2015

International Journal of Antennas and Propagation

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Two designs of frequency triplers, which use planar transitions as baluns and an antiparallel diode pair to achieve wide bandwidth, are presented. The ultrawideband transitions are utilized for input and output impedance matching of the frequency triplers. The design process and operation principles are described in this paper. The implemented frequency triplers exhibit flat response over wide frequency range of 3 to 9 GHz. The proposed Type A frequency tripler shows conversion loss of ~18 dB with above 30 dB even harmonics suppression. With Type B frequency tripler, conversion loss of ~17 dB and above 25 dB even harmonic suppression are achieved.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Compact Wideband Antiparallel Diode Frequency Triplers Utilizing Planar Transitions

Mohyuddin

Kim

Choi

2015

International Journal of Antennas and Propagation

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“…The circuit usually results in large power consumption and low frequency conversion efficiency. Alternative approaches include the waveform shaping method [3], and the injection-locking method [4]. A frequency tripler using sub-harmonic mixers was proposed in [5].…”

Section: Introductionmentioning

confidence: 99%

A 11-mW quadrature frequency tripler with fundamental cancellation

Tsai

Chang

Chen

et al. 2010

2010 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF)

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A low-power quadrature frequency tripler is designed by using the sub-harmonic mixer configuration. The circuit is implemented in CMOS 0.180um technology. The frequency tripler consumes 11.5mW, while the output buffers consumes 43.1mW, all with supply voltage of 1.8V. The fundamental Harmonic Rejection Ratio (HRR 1 ) achieves more than 35dB, and the conversion gain achieves -4.2dB at output frequency of 4.5GHz. The entire chip area occupied 1.4x1.1 mm 2 .

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“…Injection locking can also be used to implement a frequency tripler [11], [12], although the resonator used in the oscillator can consume a large chip area and can limit the bandwidth of the circuit. Recent advances in integrated circuit tripler design [13] have used waveform shaping techniques in order to generate the triple frequency and to relax the output filter requirements. In this paper, an innovative fully integrated frequency tripler is presented.…”

Section: Introductionmentioning

confidence: 99%

A Frequency Tripler Using a Subharmonic Mixer and Fundamental Cancellation

Jackson

Mazzilli

Saavedra

2009

IEEE Trans. Microwave Theory Techn.

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Abstract-A new odd-order frequency multiplier topology is demonstrated in this work that uses a subharmonic mixer to realize a frequency tripler. A feedforward circuit is used for fundamental cancellation at the output and eliminates the need for filtering structures. For demonstrative purposes, and to validate the concept, a 1-3-GHz proof-of-concept frequency tripler circuit was fabricated. The tripler circuit achieved a measured output fundamental suppression of up to 30 dB below the third harmonic and a conversion gain of up to 3 dB. The circuit was implemented in CMOS 0.18-m technology and the chip area was 0.8 mm 2 including bonding pads.Index Terms-CMOS analog integrated circuits, frequency conversion, frequency tripler, monolithic microwave integrated circuits (MMICs), subharmonic mixer (SHM).

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A Broadband CMOS Frequency Tripler Using a Third-Harmonic Enhanced Technique

Cited by 23 publications

References 29 publications

Compact Wideband Antiparallel Diode Frequency Triplers Utilizing Planar Transitions

Compact Wideband Antiparallel Diode Frequency Triplers Utilizing Planar Transitions

A 11-mW quadrature frequency tripler with fundamental cancellation

A Frequency Tripler Using a Subharmonic Mixer and Fundamental Cancellation

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