A Built-In Self-Test Structure (BIST) for Resistive RAMs characterization: Application to bipolar OxRRAM

Aziza, Hassen; Bocquet, Marc; Moreau, Mathieu; Portal, Jean‐Michel

doi:10.1016/j.sse.2014.09.005

Cited by 5 publications

(1 citation statement)

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“…The reading circuitry which basically consists in a simple biasing circuit with its output connected to a comparator is in charge of the distribution split [21]. Thus, the analog bitmaps presented in Fig.…”

Section: A Reset Switching Voltage-based Rngmentioning

confidence: 99%

Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation

Bazzi

Postel-Pellerin

Aziza

et al. 2020

2020 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)

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The intrinsic variability of the switching parameters in resistive memories has been a major wall that limits their adoption as the next generation memories. In contrast, this natural stochasticity can be beneficial for other applications such as Random Number Generators (RNGs). This paper presents two RNG approaches based on a 130nm HfO2-based Resistive RAM (RRAM) memory array. The memory array is programmed with a voltage close to the median value of the SET (resp. RESET) voltage distribution to benefit from the SET (resp. RESET) voltage variability. In both cases, only a subset of the memory array is programmed, resulting in a stochastic distribution of cell resistance values. Resistance values are next converted into a bit stream and confronted to National Institute of Standards and Technology (NIST) test benchmarks.

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Section: A Reset Switching Voltage-based Rngmentioning

confidence: 99%