A Capacitorless Flipped Voltage Follower LDO with Fast Transient Using Dynamic Bias

Lu, Yange; Chen, Ming; Wang, Kunyu; Yang, Yue

doi:10.3390/electronics11193009

Cited by 4 publications

(1 citation statement)

References 35 publications

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“…In this work, the value of k is 10, and the total gain of the OCL-LDO is 109 dB. C m1 , C m2 , C f 1 , and DFC are used to compensate the phase margin of the loop [29][30][31][32].…”

Section: Error Amplifier and Dfcmentioning

confidence: 99%

A Capacitorless LDO Regulator with Fast Feedback Loop and Damping-Factor-Control Frequency Compensation

Ning,

Guo,

Jia

et al. 2023

Electronics

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A fast feedback loop (FFL) based on comparators is proposed in this paper. The FFL improves the transient response characteristics of the output-capacitorless low-dropout (OCL-LDO) regulator. When the load current switches between 1 mA and 100 mA with 1 μs edge time, the overshoot and undershoot are 33 mV and 37 mV, respectively, and recovery time is 1.2 μs and 1.6 μs, respectively. A damping-factor-control (DFC) frequency compensation circuit is used to ensure the stability of the OCL-LDO, and the simulation results show that the phase margin exceeds 50 degree in the entire load variation range. This design is based on 180 nm process, and the area of the chip is 0.068 mm2 (without pads). A band-gap reference circuit is also designed in this work; its output voltage is 1.2 V and its temperature coefficient is 7.96 ppm/∘C. The input voltage range of the proposed OCL-LDO is 2.5 V to 5 V with a linear regulation rate of 0.128 mV/V and a load regulation rate of 0.0017 mV/mA. In addition, the load range of the proposed OCL-LDO is 0 mA to 100 mA, and the minimum required external capacitance is 0 F. The power supply rejection ratio (PSRR) is −46 dB @ 1 kHz.

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“…In this work, the value of k is 10, and the total gain of the OCL-LDO is 109 dB. C m1 , C m2 , C f 1 , and DFC are used to compensate the phase margin of the loop [29][30][31][32].…”

Section: Error Amplifier and Dfcmentioning

confidence: 99%

A Capacitorless LDO Regulator with Fast Feedback Loop and Damping-Factor-Control Frequency Compensation

Ning,

Guo,

Jia

et al. 2023

Electronics

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A feed-forward compensated FVF LDO regulator with no on-chip compensation capacitors

Manikandan

2023

Integration

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Fully Integrated 1.8 V Output 300 mA Load LDO with Fast Transient Response

et al. 2023

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Based on an 0.18 μm process, this paper proposes a fully integrated 1.8 V output 300 mA load low-dropout linear regulator (LDO) with a fast transient response. By inserting a transient-enhanced biased Class AB super source follower at the gate of the output power transistor, this LDO can quickly adjust the gate voltage of the power transistor without additional power consumption. By adding an active capacitor circuit composed of a fast comparator with offset voltage at the output point, this LDO can quickly charge/discharge the transient current and accelerate the transient response without reducing the circuit stability. Simulation results show that the proposed LDO has an output voltage of 1.8 V, when the input voltage is 2 V to 5 V while consuming 66.4 μA of quiescent current. The proposed capless LDO has a 1.94 µV/mA load regulation, a 0.55 mV/V linear regulation, and a −60 dB@1kHz power supply rejection. When the load current steps from 3 mA to 300 mA in 300 ns, the LDO settles in 400 ns with an overshoot and undershoot of 67 mV and 86 mV, respectively.

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A Capacitorless Flipped Voltage Follower LDO with Fast Transient Using Dynamic Bias

Cited by 4 publications

References 35 publications

A Capacitorless LDO Regulator with Fast Feedback Loop and Damping-Factor-Control Frequency Compensation

A Capacitorless LDO Regulator with Fast Feedback Loop and Damping-Factor-Control Frequency Compensation

A feed-forward compensated FVF LDO regulator with no on-chip compensation capacitors

Fully Integrated 1.8 V Output 300 mA Load LDO with Fast Transient Response

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