Wider linear modulation range, less switching loss, and simplicity are the goals pursued by various modulation methods of multilevel inverters. This paper proposes a new hybrid discontinuous pulsewidth modulation (HDPWM) strategy for three-level neutral-point-clamped (3L-NPC) inverter that can achieve the above goals to a certain extent. According to the position of the reference voltage vector and the actual situation of the neutral point voltage, different control modes and clamping types are selected. The neutral point voltage is controlled by DPWM strategy, which can not only greatly reduce the switch loss but also maintain the balance of the neutral point voltage and expand the linear modulation range. The implementation of the algorithm combines the advantages of carrier-based PWM (CBPWM) and space vector PWM (SVPWM). There is no need to select the nearest three vectors (NTVs) and calculate their dwell time. Only the reference voltage needs to be modified according to the control requirements, and then by comparing the modified reference voltage with the carrier, the driver pulse required by the switching devices can be generated. Compared with the existing PWM methods, it is more simple and easy to implement. Experimental results verify the validity of the method.clamping type, hybrid discontinuous pulsewidth modulation, neutral point voltage balancing, output level sequence type, space vector pulsewidth modulation
| INTRODUCTIONCompared with traditional two-level (2L) voltage source inverter (VSI), three-level neutral-point-clamped (3L-NPC) inverter has prominent advantages of simple structure, low total harmonic distortion (THD) of output voltage (or current), and low voltage stress on switching devices. 1-3 Therefore, since its introduction in 1981, 4 3L-NPC inverter has been used more and more widely, especially in medium-voltage applications.The neutral point (NP) voltage unbalance is an inherent drawback of 3L-NPC inverter, which is caused by the unbalanced charging and discharging of two DC link capacitors. The NP voltage unbalance includes AC low-frequency oscillation and DC offset. By increasing the capacitance of DC link capacitor, AC oscillation can be suppressed to a certain extent, but DC offset cannot be eliminated. Therefore, in comparison, the harm of DC offset is greater and must be avoided by other measures to ensure the stability and reliability of the inverter.