A CMOS bandgap reference circuit with a temperature coefficient adjustment block

Ishibe, Eder Issao; Navarro, João Adolfo Caldas

doi:10.1109/sbcci.2013.6644869

Cited by 3 publications

(2 citation statements)

References 12 publications

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“…To achieve low noise and low power, even using an OTA with a simple configuration, the LNA design in this work was carried out using metaheuristic algorithms, specifically particle swarm and simulated annealing [17,18]. To accomplish this task, a Matlab framework for transistor sizing and circuit optimization, based on metaheuristics, was applied [19,20]. For the calculation of the design score employed in the optimization, the attributes of the operational amplifier and of the complete LNA were taken into consideration.…”

Section: Low-noise Amplifier (Lna)mentioning

confidence: 99%

A Microdevice in a Submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS)

Nordi,

Gounella,

Amorim

et al. 2024

JLPEA

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Deep-brain stimulation (DBS) is a highly effective and safe medical treatment that improves the lives of patients with a wide range of neurological and psychiatric diseases. It has been established as a first-line tool in the treatment of these conditions for the past two decades. Closed-loop deep-brain stimulation (CLDBS) advances this tool further by automatically adjusting the stimulation parameters in real time based on the brain’s response. In this context, this paper presents a low-noise amplifier (LNA) and a neurostimulator circuit fabricated using the low-power/low-voltage 65 nm CMOS process from TSMC. The circuits are specifically designed for implantable applications. To achieve the best tradeoff between input-referred noise and power consumption, metaheuristic algorithms were employed to determine and optimize the dimensions of the LNA devices during the design phase. Measurement results showed that the LNA had a gain of 41.2 dB; a 3 dB bandwidth spanning over three decades, from 1.5 Hz to 11.5 kHz; a power consumption of 5.9 µW; and an input-referred noise of 3.45 µVRMS, from 200 Hz to 11.5 kHz. The neurostimulator circuit is a programmable Howland current pump. Measurements have shown its capability to generate currents with arbitrary shapes and ranging from −325 µA to +318 µA. Simulations indicated a quiescent power consumption of 0.13 µW, with zero neurostimulation current. Both the LNA and the neurostimulator circuits are supplied with a 1.2 V voltage and occupy a microdevice area of 145 µm × 311 µm and 88 µm × 89 µm, respectively, making them suitable for implantation in applications involving closed-loop deep-brain stimulation.

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Section: Low-noise Amplifier (Lna)mentioning

confidence: 99%

A Microdevice in a Submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS)

Nordi,

Gounella,

Amorim

et al. 2024

JLPEA

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show abstract

“…The level of detail included in the netlist, such as the areas and perimeters of the transistor drain/source, parasitic elements, etc., as well as the knowledge embedded in it, such as the fact that dimensios of M5 and M7 shoud be related to avoid a systematic offset, directly affects the quality of the optimization. The framework has already been employed for design of Reference Voltage Sources [36], OpAmps, LNAs, VCOs, Prescalers [37], etc. The metaheuristics available in it are genetic algorithms (GA), simulated annealing (SA), particle swarm (PSO), quatum QPSO (QPSO) among others.…”

Section: Designmentioning

confidence: 99%

Low-Noise Amplifier and Neurostimulator in submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS)

Nordi¹,

Gounella²,

Ginja³

et al. 2023

Preprint

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Deep-Brain Stimulation (DBS) is a a highly effective and safe medical treatment that improves the lives of patients with a wide range of neurological and psychiatric deceases, and has been consolidated as a first-line tool in the treatment of these conditionsin the last two decades. Closed Loop Deep-Brain Stimulation (CLDBS) pushes this tool further by automatically adjusting the stimulation parameters to the brain response in real time. In this context, this paper presents a Low-Noise Amplifier (LNA) and a Neurostimulator circuits fabricated in the low-power/low-voltage 65 nm CMOS process from the TSMC, which were designed targeting implantable applications. To achieve the best trade-off between input-referred noise and power consuption, metaheuristic algorithms were employed to determine and optimizes the dimentions of the LNA devices during the design phase. The measurement results showed that the LNA had a gain of 40.6 dB, a 3 dB bandwidth spanning over three decades from 10 Hz to 8.6 kHz, and a power consumption of 6.19 uW. Simulations results indicated an input-referred noise of 4.86 uVrms for the LNA. The circuit of the Neurostimulator is a programmable Howland Current-Pump, whose measurements showed its ability to generate currents with arbitrary shapes ranging from between 325 uA to +318 uA. The simulations showed a quiescent power consumption of 0.13 W with a zero neurostimulation current. The LNA and the Neurostimulator circuits are supplied with 1.2 V voltage and occupy a microdevice area of 145 um x 311 um and 88 um x 89 um, respectively, making them suitable for implantation in applications involving Closed Loop Deep-Brain Stimulation.

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Performance Comparison of High-Speed Dual Modulus Prescalers Using Metaheuristic Sizing/Optimization

Navarro

Luppe

2020

2020 33rd Symposium on Integrated Circuits and Systems Design (SBCCI)

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A CMOS bandgap reference circuit with a temperature coefficient adjustment block

Cited by 3 publications

References 12 publications

A Microdevice in a Submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS)

A Microdevice in a Submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS)

Low-Noise Amplifier and Neurostimulator in submicron CMOS for Closed-Loop Deep-Brain Stimulation (CLDBS)

Performance Comparison of High-Speed Dual Modulus Prescalers Using Metaheuristic Sizing/Optimization

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