A CMOS current reference based on generating PTC currents

Design of low-power PVT-aware circuits for power management applications

“…In addition, it should consume low power as stated. Although many works [10], [28]- [45] pertaining to the compensation techniques for temperature and process variations have been reported, other limitations like poor line sensitivity [31], relatively high T.C. [33] and high sensitivity to process variations [32] , are needed to be tackled for the robust current reference design.…”

“…Various current reference designs have been reported in the literature [10], [28]- [45]. These works are generally classified into three categories.…”