A CMOS Fully Differential Optoelectronic Receiver for Short-Range LiDAR Sensors

Joo, Ji-Eun; Lee, Myungjae; Park, Sung Min

doi:10.1109/jsen.2023.3236678

Cited by 7 publications

(6 citation statements)

References 22 publications

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“…Figure 2 depicts the schematic diagrams of the crucial AFE circuits (i.e., DFD-TIA, CI-PA, and TDA-NIC with offset cancellation). Previously, various AFE optical receivers have been suggested [6][7][8][9][10][11][12][13] where off-chip APDs were mostly integrated on PC-boards via bond-wires. As previously mentioned, this bond-wire interconnection may lead to the considerable increase of packaging costs in the cases of multi-channel receiver arrays, and mandate on-chip electrostatic discharge protection diodes (ESD) which, however, deteriorate the receiver bandwidth and worsen the noise performance.…”

Section: Afe Circuitsmentioning

confidence: 99%

“…Besides, the practical CMOS implementation of on-chip APDs results in low responsivity [14]. Despite these shortcomings, we have optimized the AFE circuits with the exploitation of CMOS on-chip avalanche multiplication [10,15].…”

Section: Afe Circuitsmentioning

confidence: 99%

“…The crucial specifications of the AFE circuits include 85-dBΩ transimpedance gain, 700-MHz bandwidth, 15-pA/ √ Hz noise current spectral density, and a 40-dB power supply rejection ratio for the proper operations of the following digital circuitry [10].…”

Section: Afe Circuitsmentioning

confidence: 99%

“…This architecture, however, gives rise to inherent defects in the optical measurements. Firstly, it necessitates a costly laser driver to emit narrow optical pulses [6][7][8][9][10][11]. Secondly, targets are necessary for optical testing.…”

Section: Introductionmentioning

confidence: 99%

“…Therefore, we propose a CMOS optoelectronic receiver IC (CORIC) for simple low-cost testing of a LiDAR Rx, which comprises an analog front-end (AFE) circuit, a high-speed digital input buffer, a variable delay cell, and a two-dimensional (2D) modified TDC. In particular, the AFE can successfully recover narrow pulses within the detection range up to 10 m [10]. It consists of a dual-feedback folded-cascode differential TIA (DFD-TIA), an active single-to-differential (ASD) converter, a cross-coupled inverter-based post-amplifier (CI-PA), and a two-stage differential amplifier with negative impedance compensation (TDA-NIC).…”

mentioning

confidence: 99%

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A Low-Cost Measurement Methodology for LiDAR Receiver Integrated Circuits

Joo

Choi

Chon

et al. 2023

Sensors

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This paper presents a test methodology to facilitate the measuring processes of LiDAR receiver ICs by avoiding the inherent walk error issue. In a typical LiDAR system, a costly laser diode driver emits narrow light pulses with fast rising edges, and the reflected pulses from targets enter an optical detector followed by an analog front-end (AFE) circuit. Then, the received signals pass through the cascaded amplifiers down to the time-to-digital converter (TDC) that can estimate the detection range. However, this relatively long signal journey leads to the significant decline of rising-edge slopes and the output pulse spreading, thus producing inherent walk errors in LiDAR receiver ICs. Compensation methods requiring complex algorithms and extra chip area have frequently been exploited to lessen the walk errors. In this paper, however, a simpler and lower-cost methodology is proposed to test LiDAR receiver ICs by employing a high-speed buffer and variable delay cells right before the TDC. With these circuits, both START and STOP pulses show very similar pulse shapes, thus effectively avoiding the walk error issue. Additionally, the time interval between two pulses is easily determined by varying the number of the delay cells. Test chips of the proposed receiver IC implemented in a 180-nm CMOS process successfully demonstrate easier and more accurate measurement results.

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