In this article, a novel limiters power is designed and validated by ADS software. The new limiter is based on a mictrostrip circuit and uses M SFET transistors and Schottky diode as actives components. This Power Limiter have been optimized in two steeps: the first circuit is composed of one stage. Simulation of this circuit presents some limitation in termes of limitation rate. To improve this performance, a new circuit composed of two stages is simulated and optimized. The final circuit exhibits 25 dB of limitation rate while insertion loss is-1 dB with a threshold input power level of 0 dBm until a maximum input power level of 30 dBm.