A compact wideband CMOS LNA with low power consumption

Abstract

In this letter, a wideband low noise amplifier (LNA) operating at 1–5 GHz is proposed.The circuit is designed with a TSMC 0.18‐μm RF CMOS process. To obtain high transconductance with low power consumption, two types of inverters are used. The proposed LNA is expected to reduce the size of chip about 70–80% by using only the single‐spiral inductor. The measured voltage gain is 14.4–15.5 dB and noise figure (NF) is 4.3–5.0 dB from 1–5 GHz. The total power consumption of the proposed LNA is 9.8 mW from a 1.4 V supply voltage and chip area occupies only 0.5 × 0.5 mm2. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:2360–2363, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27086

Analysis and optimization of a resistive‐feedback inverter LNA

“…Thus, as G m increases, the voltage gain increases, which affects the input impedance matching in (1).…”

“…The inverter‐structure amplifier is widely used in digital and analog amplifiers for high gain and low power consumption in the CMOS process . It consists of NMOS and PMOS transistors with a back‐to‐back drain and a combined gate.…”

“…Most inverter‐structure low‐noise amplifiers (LNAs) have been designed to have a large PMOS . This tendency has been conventionally extended to the design of the resistive‐feedback inverter‐structure LNA to achieve self‐biasing and wide bandwidth .…”

“…The inverter-structure amplifier is widely used in digital and analog amplifiers for high gain and low power consumption in the CMOS process. [1][2][3][4][5] It consists of NMOS and PMOS transistors with a back-to-back drain and a combined gate. Conventionally, the PMOS has been designed to be two or three times larger than the NMOS due to their mobility difference.…”

“…Most inverter-structure low-noise amplifiers (LNAs) have been designed to have a large PMOS. 1,2 This tendency has been conventionally extended to the design of the resistive-feedback inverter-structure LNA to achieve selfbiasing and wide bandwidth. [3][4][5] In, 3,4 the size ratio of the PMOS to the NMOS was 2:1, which follows the conventional rule of the inverter.…”