A Comparative Study on Electrical Characteristics of Au/N-Si Schottky Diodes, with and Without Bi-Doped PVA Interfacial Layer in Dark and Under Illumination at Room Temperature

Abstract

In order to see the effect of Bi-doped PVA interfacial layer on electrical characteristics, both Au/n-Si (MS) and Au/Bidoped PVA/n-Si (MPS) type Schottky barrier diodes (SBDs) were fabricated, and their main electrical parameters were investigated using current-voltage (I-V) and capacitance-voltage (C-V) measurements, in dark and under illumination at room temperature. Forward bias semi-logarithmic I-V plots of these SBDs show two distinct linear regions, with different slopes in the low and intermediate voltage region. Such behavior in I-V plots was explained by two parallel diodes model. Experimental results show that the ideality factor (n), barrier height (φ b ), series and shunt resistances (R s and R sh ), and the density of interface states/traps (N ss ) are strong functions of illumination level and applied bias voltage. The R s values were determined from the I-V characteristics, by using both Ohm's law. The energy distribution profile of N ss was also obtained from the forward bias I-V characteristics, by taking into account voltage dependent barrier height (φ e ) and ideality factor (n). It was found that Bi-doped PVA layer lead to a considerable decrease in the leakage current, R s and N ss and increase in R sh and rectifier rate (RR=I F /I R ). In conclusion, a thin Bi-doped PVA interfacial layer, considerably improved the diode performance, both in dark and under illumination.account voltage dependent barrier height (φ B (V)) and ideality factor n(V). Experimental results show that the Bi-doped interfacial PVA layer led to considerable decrease in the leakage current, R s and N ss and led to increase in R sh and rectifier rate (RR=I F /I R ). So, it can be said that Bi-doped PVA considerably improved the performance of SBD. Experimental ProcedureFor the fabrication of Au/PVA (Bi-doped)/n-Si (MPS), (phosphor doped) single crystal silicon with surface orientation, 350 μm thickness and 0.7 Ω.cm resistivity was used. Si wafer was degreased in organic solution of peroxide-ammoniac solution in 10 minutes, and then etched in a sequence of H 2 O+HCl solution, and finally quenched in de-ionized water resistivity of 18 MΩ.cm for a prolonged time. Preceding each cleaning step, the wafer was rinsed thoroughly in de-ionized water. Immediately after surface cleaning, high purity (99.999%) gold (Au), with a thickness of ~2000Å, was thermally evaporated onto the whole back side of Si wafer, in a pressure about 10 -6 Torr in high vacuum metal evaporation system. In order to perform a low resistivity ohmic back metal contact, n-Si wafer was sintered at about 450°C for 5 min in N 2 atmosphere.Immediately after the formation of ohmic contact, 0.5 g of bismuth acetate was mixed with 50 g of polyvinyl Alcohol (PVA), molecular Citation: Alialy S, Tecimer H, Uslu H, Altındal Ş (2013) A Comparative Study on Electrical Characteristics of Au/N-Si Schottky Diodes, with and Without Bi-Doped PVA

Barrier modification of Au/n-GaAs Schottky structure by organic interlayer

“…(1), and the reverse fit is to Eq. (10) values also while considering the thermionic emission equation, without which unreliable values of n and I 0 are obtained. Hence, the term V in Eq.…”

“…This leads to Fermi level pinning, thereby reducing its performance drastically and limiting its application to be used as tailor-made devices. However, the presence of an interfacial layer between the metal contact and the semiconductor can lead to change in band alignment by changing the barrier height (BH) [2,[10][11][12][13][14]. This change is related to many parameters such as the type of the chosen organic compound and its formation, its thickness, the process of surface preparation, the impurity concentration of a semiconductor and the interfacial layerinduced dipole at the M-S interface [13][14][15][16].…”

Electronic transport of Au/(Ca1.9Pr0.1Co4Ox)/n-Si structures analysed over a wide temperature range

“…The analysis of a device measured only at room temperature or over a narrow range of temperatures cannot yield detailed information on the conduction mechanism and the nature of BH at the M/S interface. These measurements, when carried out over a wide temperature range, better reveal various aspects on the conduction mechanism and the nature of BH [10][11][12][13][14]. Many previous studies have found increases in the BH and decreases in n with increasing temperature [4][5][6][7][8][10][11][12][13][14][15][16], in disagreement with the predictions of the standard TE theory of temperature-independent BH and ideality factor.…”

“…These measurements, when carried out over a wide temperature range, better reveal various aspects on the conduction mechanism and the nature of BH [10][11][12][13][14]. Many previous studies have found increases in the BH and decreases in n with increasing temperature [4][5][6][7][8][10][11][12][13][14][15][16], in disagreement with the predictions of the standard TE theory of temperature-independent BH and ideality factor. In the last two decades, both the abnormal behaviour of the BH and the nonlinearity of the Richardson plot have been observed [17][18][19][20][21][22].…”

“…These mechanisms include thermionic emission (TE), thermionic field emission (TFE), field emission (FE), generation-recombination (GR) and tunnelling via interface states or traps. The quality and performance of these devices are dependent on various parameters such as temperature, applied bias voltage or electric field, the surface process, interfacial layer native or deposited at MIS interface, the magnitude of doping concentration atoms (acceptor or donor), series and shunt resistances (R s and R sh ) of diode, interface traps (D it ), the formation of BH and its homogeneity [8][9][10][11][12][13]. The analysis of a device measured only at room temperature or over a narrow range of temperatures cannot yield detailed information on the conduction mechanism and the nature of BH at the M/S interface.…”