A comparative study on hot carrier effects in inversion-mode and junctionless MuGFETs

Impact of Hot Carrier Aging on the Performance of Triple-Gate Junctionless MOSFETs

“…The high impact ionization rate in the drain region of n-channel JL nanowire MOSFETs [3], led to the investigation of their hot carrier (HC) degradation mechanisms. However, HC studies in JL multi-gate MOSFETs are limited to few works, referred on investigation of HC effects in triple-gate (TG) JL MOSFETs [4]- [6] and gate-all-around (GAA) JL nanowires [7]- [9]. Therefore, investigation of HC-induced degradation mechanisms in nanoscale JL multi-gate MOSFETs is a very important topic, since HC effect is a severe reliability issue in increasingly scaled transistors.…”

“…In multi-gate MOSFETs, HC effects become complicated compared to the IM devices because the conduction path of the drain current depends on the gate bias voltage. Comparative studies of HC effects have shown that the stress bias conditions for the worse device degradation are different in the JL and IM transistors depending on the device operation region [4]. In JL GAA MOSFETs, the HC degradation under on-state stress conditions is higher in relation to the off-state stress conditions due to the higher density of carriers confined in the center of the nanowire [8].…”

Effects of Fin Sidewall Angle on Subthreshold Characteristics of Junctionless Multigate Transistors

“…4,5) Thus, more and more concerns regarding the junctionless multigate transistor (JMT) arose, and its performance characteristics such as electrical characteristics, temperature dependence, and reliability features have been investigated in Refs. [3][4][5][6][7][8]. For JMTs, their superior shortchannel effect immunity, excellent on/off ratio, extremely low leakage current, and simple fabrication process have been reported in Refs.…”

Triple-gate junctionless MOSFETs

“…However, HC studies in JL multi-gate MOSFETs are limited to few works, referred on investigation of HC effects in triple-gate (TG) JL MOSFETs [187], [188] and GAA JL nanowires [189]- [191]. Therefore, investigation of HC-induced degradation mechanisms in nanoscale JL multi-gate MOSFETs is a very important topic, since HC effect is a severe reliability issue in increasingly scaled transistors.…”

“…Comparative studies of HC effects have shown that the stress bias conditions for the worse device degradation are different in the JL and IM transistors depending on the device operation region [187]. In JL GAA MOSFETs, the HC degradation under on-state stress conditions is higher in relation to the off-state stress conditions due to the higher density of carriers confined in the center of the nanowire [190].…”