2008
DOI: 10.1007/978-3-540-85538-5_20
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A Comparison between Hardware Accelerators for the Modified Tate Pairing over $\mathbb{F}_{2^m}$ and $\mathbb{F}_{3^m}$

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Cited by 29 publications
(39 citation statements)
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“…To our knowledge, the place-and-route results on several Xilinx FPGA devices of our designs improved both the computation time and the area-time tradeoff of all the hardware pairing coprocessors previously published in the open literature [28,29,1,30,19,32,41,40,39,7,43,10,25]. We are also currently applying the same methodology used in this work to design a coprocessor for the Tate pairing over F 2 m , with promising preliminary results.…”
Section: Resultsmentioning
confidence: 65%
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“…To our knowledge, the place-and-route results on several Xilinx FPGA devices of our designs improved both the computation time and the area-time tradeoff of all the hardware pairing coprocessors previously published in the open literature [28,29,1,30,19,32,41,40,39,7,43,10,25]. We are also currently applying the same methodology used in this work to design a coprocessor for the Tate pairing over F 2 m , with promising preliminary results.…”
Section: Resultsmentioning
confidence: 65%
“…Table 2 provides the reader with a comparison between our work and accelerators for the Tate and the η T pairing over supersingular (hyper)elliptic curves published in the open literature (our comparison remains fair since the Tate pairing can be computed from the η T pairing at no extra cost [7]). The third column measures the security of the curve as the key length required by a symmetric-key algorithm of equivalent security.…”
Section: Results and Comparisonsmentioning
confidence: 99%
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“…Several architectures for the computation of cryptographic pairings have been proposed in the literature [14,15,16,17,18,19,20,21,22,23,24,25,26]. All these implementations use supersingular curves over fields of characteristic 2 or 3, achieving only very low security levels, sometimes even below 80 bit.…”
Section: Related Workmentioning
confidence: 99%