A comparison of electrical and optical clock networks in nanometer technologies

Polarization division multiplexing for optical data communications

“…Recently, Thangaraj et al described the design and successful integration of high speed photodiodes on CMOS ICs for a fully operational CMOS-compatible optical digital clock distribution and electrical recovery system in a 0.35 nm CMOS process [1,36,49,62]. This work demonstrates the viability of inexpensive optical-electrical signal transformations at GHz speeds in CMOS technology.…”

“…Fast switching photodiodes have been used for optical high speed digital clocking in various silicon chips. [1,36,49] The photodiode model was designed using…”

Trends in Emerging On-Chip Interconnect Technologies

“…A similar claim was made by Chen, et al 28) , where the authors argued that since most of the skew and power of clock signaling arises in local clock distribution, there is no significant skew and power advantages in using an optical solution. Ackland, et al 29) presented a study showing how an H-tree electrical clock network does not scale well, resulting in unacceptable levels of skew and jitter, compared to an optical tree. The authors claimed that while there are many technical challenges in implementing an optical tree, in principle the best solution might be a hybrid tree network, in which the front end is implemented optically, while the backend consists of a large number of small electrical trees.…”