2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) 2023
DOI: 10.1109/ddecs57882.2023.10139763
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A Comprehensive Analysis of Transient Errors on Systolic Arrays

Eleonora Vacca
1
,
Sarah Azimi
2
,
Luca Sterpone
3
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Cited by 7 publications
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Dual-Modular-Redundancy Voting Circuits for Single-Event-Transient Mitigation

Barbirotta,
Angioli,
Mastrandrea
et al. 2024
2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
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Dual-Modular-Redundancy Voting Circuits for Single-Event-Transient Mitigation

Barbirotta,
Angioli,
Mastrandrea
et al. 2024
2024 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)
0
0
0
0
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RunSAFER: A Novel Runtime Fault Detection Approach for Systolic Array Accelerators

Vacca,
Ajmone,
Sterpone
2023
2023 IEEE 41st International Conference on Computer Design (ICCD)
3
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Leveraging Algorithm-based Fault Tolerance for Propagation Error Detection in NPUs

Kim,
Hong
2024
2024 21st International SoC Design Conference (ISOCC)
0
0
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