A Comprehensive Investigation of Vertically Stacked Silicon Nanosheet Field Effect Transistors: an Analog/RF Perspective

Tayal, Shubham; Ajayan, J.; Joseph, L. M. I. Leo; Tarunkumar, J.; Nirmal, D.; Jena, Biswajit; Nandi, Ashutosh

doi:10.1007/s12633-021-01128-x

Cited by 26 publications

(12 citation statements)

References 37 publications

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“…For improved linearity, V IP3 should be prominent. It is a 3rd‐order voltage intercept point that implies the induced input voltage upon which 1st‐order harmonic voltage turns out to be equal to 3rd‐order harmonic 6 . V IP3 is defined as:

V IP 3 = \sqrt{24 \times \frac{g m 1}{g m 3}}

…”

Section: Resultsmentioning

confidence: 99%

“…Further research is needed to address these challenges and optimize nanosheet FET performance. [6][7][8][9] Among these designs, surrounded gate Nanowire MOSFET shows better immunity to short-channel effects (SCEs) because of higher gate control. 10,11 Despite their promising characteristics, NWFETs, or Nanowire Field-Effect Transistors, exhibit certain drawbacks.…”

Section: Introductionmentioning

confidence: 99%

“…Nanosheet FETs offer performance and power efficiency advantages, but face challenges including complex manufacturing, variability in device parameters, and increased power consumption due to additional interfaces. Further research is needed to address these challenges and optimize nanosheet FET performance 6–9 . Among these designs, surrounded gate Nanowire MOSFET shows better immunity to short‐channel effects (SCEs) because of higher gate control 10,11 .…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Analytical analysis and linearity performance of dual metalhigh‐KSchottky nanowireFET(DM‐HK‐SNWFET)

Sharma

Nath

Deswal³

et al. 2023

Int J Numerical Modelling

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This study's objectives are to deliver a relative analysis of non‐uniformly doped (NUD) and uniformly doped Dual Metal High‐K Schottky nanowire FET (DM‐HK‐SNWFET). Surface potential, subthreshold current, subthreshold swing, and drain current have been expressed and analyzed by resolving 2D Poisson's equation with suitable boundary conditions. The analog performance of the device is verified by examining cut‐off frequency (fT), trans‐conductance frequency product (TFP), gain frequency product (GFP), and gain trans‐conductance frequency product (GTFP). The results show suitable RF circuit parameters with a high switching ratio (≈3 × 109) and low subthreshold swing (61 mV/decade) for NUD‐DM‐HK‐SNWFET. Additionally, linearity frequency of merits (FOMs) and distortion performance are also studied by numerically calculating higher order voltage and current intercept point (VIP2, VIP3, IIP3, IMD3); 1‐dB compression point and Harmonics distortions (HD2 and HD3) using transconductance (gm1) along with its higher derivatives gm2 and gm3. These parameters exhibit high‐level linearity and low‐level distortion at zero crossover points in NUD‐DM‐HK‐SNWFET, making it a better contender for low‐power and high‐performance applications.

show abstract

V IP 3 = \sqrt{24 \times \frac{g m 1}{g m 3}}

…”

Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Analytical analysis and linearity performance of dual metalhigh‐KSchottky nanowireFET(DM‐HK‐SNWFET)

Sharma

Nath

Deswal³

et al. 2023

Int J Numerical Modelling

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“…Furthermore, we considered the scattering of charge carriers by charged impurity ions, which leads to a degradation of carrier mobilities [ 18 ]. These physical models are proper to the thin layer device, including nanowire and nanosheet structures [ 19 ]. A quasi-stationary numerical TCAD simulation was used to obtain the DC transfer curves of the devices [ 20 ].…”

Section: Methodsmentioning

confidence: 99%

Prediction of Device Characteristics of Feedback Field-Effect Transistors Using TCAD-Augmented Machine Learning

2023

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In this study, the device characteristics of silicon nanowire feedback field-effect transistors were predicted using technology computer-aided design (TCAD)-augmented machine learning (TCAD-ML). The full current–voltage (I-V) curves in forward and reverse voltage sweeps were predicted well, with high R-squared values of 0.9938 and 0.9953, respectively, by using random forest regression. Moreover, the TCAD-ML model provided high prediction accuracy not only for the full I-V curves but also for the important device features, such as the latch-up and latch-down voltages, saturation drain current, and memory window. Therefore, this study demonstrated that the TCAD-ML model can substantially reduce the computational time for device development compared with conventional simulation methods.

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“…Recently, silicon nanosheet devices have attracted a significant increase in interest, both for use in integrated nanoscale electronics and for studying fundamental properties in small scales [ 1 , 2 , 3 , 4 ]. In order to achieve reliable devices or test structures at nanoscale dimensions, it is necessary to control doping levels on silicon nanosheets and to reduce leakage power.…”

Section: Introductionmentioning

confidence: 99%

Modeling and Simulation Investigation of Ferroelectric-Based Electrostatic Doping for Tunnelling Field-Effect Transistor

et al. 2023

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In this paper, a novel ferroelectric-based electrostatic doping (Fe-ED) nanosheet tunneling field-effect transistor (TFET) is proposed and analyzed using technology computer-aided design (TCAD) Sentaurus simulation software. By inserting a ferroelectric film into the polarity gate, the electrons and holes are induced in an intrinsic silicon film to create the p-source and the n-drain regions, respectively. Device performance is largely independent of the chemical doping profile, potentially freeing it from issues related to abrupt junctions, dopant variability, and solid solubility. An improved ON-state current and ION/IOFF ratio have been demonstrated in a 3D-calibrated simulation, and the Fe-ED NSTFET’s on-state current has increased significantly. According to our study, Fe-ED can be used in versatile reconfigurable nanoscale transistors as well as highly integrated circuits as an effective doping strategy.

show abstract

A Comprehensive Investigation of Vertically Stacked Silicon Nanosheet Field Effect Transistors: an Analog/RF Perspective

Cited by 26 publications

References 37 publications

Analytical analysis and linearity performance of dual metalhigh‐KSchottky nanowireFET(DM‐HK‐SNWFET)

Analytical analysis and linearity performance of dual metalhigh‐KSchottky nanowireFET(DM‐HK‐SNWFET)

Prediction of Device Characteristics of Feedback Field-Effect Transistors Using TCAD-Augmented Machine Learning

Modeling and Simulation Investigation of Ferroelectric-Based Electrostatic Doping for Tunnelling Field-Effect Transistor

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