2007
DOI: 10.1109/tdmr.2007.897517
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A Comprehensive Study on the Soft-Error Rate of Flip-Flops From 90-nm Production Libraries

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Cited by 61 publications
(24 citation statements)
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“…The critical charge associated with such an event is denoted Q crit,h . If hits at both nMOS and pMOS drains are considered, then the following expression models the bit cell SER [27]:…”
Section: Soft Error Rate (Ser)mentioning
confidence: 99%
“…The critical charge associated with such an event is denoted Q crit,h . If hits at both nMOS and pMOS drains are considered, then the following expression models the bit cell SER [27]:…”
Section: Soft Error Rate (Ser)mentioning
confidence: 99%
“…Area is much less a concern here because in general the number of latches and/or flip-flops in an IC is orders of magnitude less than the amount of SRAM bit cells. As a result, latch and flip-flop SER shows a much larger variation between different cell designs Heijmen et al of Philips, STMicroelectronics, and Freescale Semiconductor published measured alpha-and neutron-SER data of five different flip-flops from a standard-cell library [25]. The flip-flop cells differed in threshold voltage, circuit schematic, cell height, drive strength, and/or functionality.…”
Section: Ser Of Latches and Flip-flopsmentioning
confidence: 99%
“…When an energetic particle strikes a sensitive region in a semiconductor device, it creates a track of electron-hole pairs that can cause a transient current to flow through the pn junction altering the voltage of the circuit stroke node [7]. The sensitive 0018-9499/$25.00 © 2008 IEEE sites are the surroundings of the reverse-biased drain junctions of a transistor biased in the off state.…”
Section: Detecting Soft Errors By Using Bulk-bicsmentioning
confidence: 99%