A constrained optimization approach for accurate and area efficient bandgap reference design

Andrade, A.B; Petraglia, Antonio; Soares, Carlos Fernando Teodósio

doi:10.1016/j.mejo.2017.05.012

Cited by 9 publications

(1 citation statement)

References 13 publications

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“…To reduce the effect of non-ideal factors such as process deviation on the output reference voltage [5] , this design uses a trim circuit to adjust the TC of the voltage by changing magnitude of the resistance Figure 5. Schematic of trimming resistors.…”

Section: Trimmingmentioning

confidence: 99%

A New Piecewise-Compensated Bandgap Reference Circuit with a Trimming Procedure

Wei

Duan

2023

J. Phys.: Conf. Ser.

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A new CMOS bandgap reference (BGR) circuit with a piecewise-compensation circuit and a trimming network is proposed and designed to obtain a bandgap reference voltage with a low-temperature coefficient and a high precision, taking into account the effect of non-ideal factors on the results. The proposed piecewise compensation circuit is designed to achieve a constant reference voltage by using a current mirror to mirror the current, combined with a subtractive circuit and an additive circuit to obtain a low-temperature coefficient over an extensive temperature range. The trim network part is used to change the voltage value of the output reference by controlling the magnitude of the resistance value of the resistors connected to the circuit. The design and simulation of the proposed bandgap reference circuit are obtained by using Cadence Spectre simulation by SMIC 0.18 μm CMOS technology. The results indicates that when the power is 3.3 V and the temperature scope is within -40 °C to 125 °C, the output voltage is 1.2 V with the temperature coefficient equal to 0.658 ppm/°C. When the power varies within 3.2 V to 3.4 V, the linear regulating rate is 0.001019 %/V.

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Section: Trimmingmentioning

confidence: 99%