2008
DOI: 10.1587/elex.5.705
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A decoupled architecture for multi-format decoder

Abstract: Abstract:We propose a VLSI design of Multi-Format Decoder (MFD) to support multiple video codec standards such as MPEG-2, MPEG-4, H.264 and VC-1. A decoupled MFD architecture is introduced in order to easily add or remove the codecs. The decoupled architecture preserves the stability of the previously designed and verified codecs. It also reduces the gate count by sharing the large-size common resources. The design size is 2.4 M gates and the operating clock frequency is 225 MHz in the 65 nm process.

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Cited by 5 publications
(7 citation statements)
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“…Bae [4] proposes a decoupled architecture of multiformat video decoder to reduce the design size by sharing large-sized resources such as embedded RISC processors, on-chip memories and external interface logic dominating more than half of a typical codec. Other hardwired logic in charge of the macroblock level decoding is designed by a decoupled architecture to avoid excessive sharing of resources.…”
Section: Previous Workmentioning
confidence: 99%
See 2 more Smart Citations
“…Bae [4] proposes a decoupled architecture of multiformat video decoder to reduce the design size by sharing large-sized resources such as embedded RISC processors, on-chip memories and external interface logic dominating more than half of a typical codec. Other hardwired logic in charge of the macroblock level decoding is designed by a decoupled architecture to avoid excessive sharing of resources.…”
Section: Previous Workmentioning
confidence: 99%
“…If individual codecs are designed separately in hardware solutions, there is a large overhead, when these codecs are integrated in a SoC. Several attempts have been made to achieve better areaefficiency by fusing these into one [1]- [4]. They are called multi-format codecs.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…Therefore, array processors are particularly suited for boosting compute-intensive applications, such as video encoding/decoding, information security and big data processing in cloud environments. Take the widely studied multi-format video decoding [2] as an example. The compute-intensive tasks, including inverse transformation (IT), motion compensation (MC), intra-prediction (IP) and loop filtering (LF) may account for 60% to 80% of the total workload of the system (Fig.…”
Section: Introductionmentioning
confidence: 99%
“…The horizontal filtering is performed on the left and right boundary edges of the coding tree block. The vertical filtering is performed on the top and bottom boundary edges of the coding Various VLSI architectures have been researched for the previous video codecs including H.264/AVC [2,3,4,5,6]. For the design of loop filter or deblocking filter for H.264/AVC, many works have been done too [2,3,4].…”
Section: Introductionmentioning
confidence: 99%