A deep-level transient spectroscopy study of silicon interface states using different silicon nitride surface passivation schemes

Gong, Chun; Simoen, Eddy; Posthuma, Niels; Kerschaver, Emmanuel Van; Poortmans, Jef; Mertens, R.

doi:10.1063/1.3358140

Cited by 27 publications

(22 citation statements)

References 14 publications

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“…3(a) and (b) are related to Si/SiO 2 interface states, one can compare with literature data on p-type silicon, where similar spectra have been obtained [36]- [38]. The shoulder H2 could then correspond with the donor level at E V + 0.3 eV of the P b dangling bond centers [37]- [40]. The main peak H1 could then correspond with the P b 1 dangling bond center at the (100) interface, giving rise to near midgap states [41]- [43].…”

Section: B Characterization Of the A-si:h/c-si Interface And The C-si Bulk Using Dltssupporting

confidence: 60%

Dry Passivation Process for Silicon Heterojunction Solar Cells Using Hydrogen Plasma Treatment Followed by <italic>In Situ</italic> a-Si:H Deposition

Wang

Bearda

et al. 2018

IEEE J. Photovoltaics

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A fully dry and hydrofluoric-free low-temperature process has been developed to passivate n-type crystalline silicon (c-Si) surfaces. Particularly, the use of a hydrogen (H 2 ) plasma treatment followed by in situ intrinsic hydrogenated amorphous silicon (a-Si:H) deposition has been investigated. The impact of H 2 gas flow rate and H 2 plasma processing time on the a-Si:H/c-Si interface passivation quality is studied. Optimal H 2 plasma processing conditions result in the best effective minority carrier lifetime of up to 2.5 ms at an injection level of 1 × 10 15 cm −3 , equivalent to the best effective surface recombination velocity of 4 cm/s. The reasons that enable such superior passivation quality are discussed in this paper based on the characterization of the a-Si:H/c-Si interface and c-Si substrate using transmission electron microscopy, high angle annular dark field scanning transmission electron microscopy, and deep-level transient spectroscopy. Index Terms-Hydrogenated amorphous silicon (a-Si:H), hydrogen (H 2 ) plasma, passivation, silicon heterojunction (SHJ) solar cells. I. INTRODUCTION S ILICON heterojunction (SHJ) solar cells are the subject of strong industrial interest because of their simple device structure and capacity to achieve a very high energy conversion efficiency. A high open-circuit voltage of up to 750 mV has been demonstrated by Panasonic in an SHJ cell [1]. In early 2017, a world record efficiency of 26.7% was reported by Kaneka using Manuscript

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Section: B Characterization Of the A-si:h/c-si Interface And The C-si Bulk Using Dltssupporting

confidence: 60%

Dry Passivation Process for Silicon Heterojunction Solar Cells Using Hydrogen Plasma Treatment Followed by <italic>In Situ</italic> a-Si:H Deposition

Wang

Bearda

et al. 2018

IEEE J. Photovoltaics

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“…The DLTS spectroscopy technique was originally developed by Lang to characterize bulk traps (the activation energy of traps, capture cross section and density of defects) in p-n junctions and Shottky barriers [18]. It has been demonstrated later that it is also useful for studying interface states in MIS structures [19][20][21][22][23]. The basic advantage of DLTS spectroscopy is easier interpretation of the measured data when compared to admittance spectroscopy.…”

Section: Introductionmentioning

confidence: 98%

Analysis of MIS equivalent electrical circuit of Au/Pd/Ti-SiO2-GaAs structure based on DLTS measurements

et al. 2013

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In this paper MIS equivalent electrical circuit of Au/Pd/Ti-SiO 2 -GaAs has been analyzed by a comparison of the results obtained from admittance and DLTS spectroscopy. Two groups of peaks with different magnitude and different gate voltage dependence have been observed in DLTS and admittance spectra. Based on the analysis of the peaks behavior, it has been concluded that they are associated with the response of bulk traps and interface states, respectively. In order to characterize bulk traps and interface states responsible for the occurrence of two groups of peaks in normalized conductance spectra we have used the equivalent circuit with two CPE-R branches. The time constant values estimated for both peaks from admittance analysis have been compared with the time constant determined from DLTS analysis. Some discrepancies have been noted between the time constants obtained for interface states whereas the time constants for bulk traps were compatible. It has been also demonstrated that when conductance peaks overlap, the admittance experimental data can be fitted by the equivalent electrical model with only one CPE-R branch. However, in this case incomplete information about the analyzed process has been obtained despite the fact that all model validity criteria can be fulfilled and the model seems to be correct.

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“…DLTS was performed using a Fast-Fourier Transform (FFT) based system, 36 with the samples mounted in a liquid-nitrogen cryostat, where the temperature was varied between 75 K and 320 K. In addition, isothermal scans at room temperature (RT) were also carried out, where the sampling period t w was varied between 1 ms and 1 s. Measurements were performed employing different bias pulses from V R to V P in order to scan different parts of the MOS structure. [37][38][39] For a bias pulse in depletion, mainly deep levels in the silicon depletion region, with a possible contribution from interface states, are probed. Pulsing to V FB or beyond (more positive bias) emphasizes the contribution of the interface states in the upper half of the bandgap and possibly also populates so-called border traps in the SiO 2 .…”

Section: Methodsmentioning

confidence: 99%

Deep Level Assessment of n-Type Si/SiO₂ Metal-Oxide-Semiconductor Capacitors with Embedded Ge Quantum Dots

Aouassa,

Vrielinck,

Simoen

2017

Meet. Abstr.

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This paper reports on a Deep-Level Transient Spectroscopy (DLTS) study of n-type silicon Metal-Oxide-Semiconductor capacitors with Ge Quantum Dots (QDs) embedded in a SiO 2 gate dielectric. For a zero-dot reference and in capacitors fabricated with a 1, 2 or 3 nm amorphous Ge layer similar spectra have been obtained. They are characterized by a peak at or above room temperature for a bias pulse in depletion and by an electron trap around 200 K, which is shown to be associated with dangling bond acceptor states at the Si/SiO 2 interface. The maximum density of states increases with average Ge QD size, while the average activation energy, corresponding with the peak maximum position shifts to lower values. Although no direct evidence of electron tunneling to the Ge QDs has been found so far, there is a marked impact of their presence on the Capacitance-Voltage characteristics, resulting in an increase in the accumulation capacitance with QD size, a shift of the flatband voltage toward more positive gate bias and a counterclockwise hysteresis, associated with the charging and discharging of QD levels and related Ge traps in the SiO 2 .

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A deep-level transient spectroscopy study of silicon interface states using different silicon nitride surface passivation schemes

Cited by 27 publications

References 14 publications

Dry Passivation Process for Silicon Heterojunction Solar Cells Using Hydrogen Plasma Treatment Followed by <italic>In Situ</italic> a-Si:H Deposition

Dry Passivation Process for Silicon Heterojunction Solar Cells Using Hydrogen Plasma Treatment Followed by <italic>In Situ</italic> a-Si:H Deposition

Analysis of MIS equivalent electrical circuit of Au/Pd/Ti-SiO2-GaAs structure based on DLTS measurements

Deep Level Assessment of n-Type Si/SiO₂ Metal-Oxide-Semiconductor Capacitors with Embedded Ge Quantum Dots

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A deep-level transient spectroscopy study of silicon interface states using different silicon nitride surface passivation schemes

Cited by 27 publications

References 14 publications

Dry Passivation Process for Silicon Heterojunction Solar Cells Using Hydrogen Plasma Treatment Followed by <italic>In Situ</italic> a-Si:H Deposition

Dry Passivation Process for Silicon Heterojunction Solar Cells Using Hydrogen Plasma Treatment Followed by <italic>In Situ</italic> a-Si:H Deposition

Analysis of MIS equivalent electrical circuit of Au/Pd/Ti-SiO2-GaAs structure based on DLTS measurements

Deep Level Assessment of n-Type Si/SiO2 Metal-Oxide-Semiconductor Capacitors with Embedded Ge Quantum Dots

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Deep Level Assessment of n-Type Si/SiO₂ Metal-Oxide-Semiconductor Capacitors with Embedded Ge Quantum Dots