Adaptive filtering techniques are widely used in the fields of signal processing and communication such as echo/noise cancellation and speech/image coding. Adaptive filters usually need real time ability to process signal. This paper presents a high speed and flexible VLSI architecture. This filter is the digital adaptive finite impulse response (FIR) filter based on the delayed error least mean square (DELMS) algorithm. The architecture has hardware utilization efficiency (HUE) of loo%, and we can easily scale the filter without reducing the throughput rate. The timing simulation results demonstrate the effectiveness of the architecture. We have used 0.6 p CMOS SPTM standard cells technology to implement the chip.