2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) 2013
DOI: 10.1109/ispass.2013.6557149
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A detailed and flexible cycle-accurate Network-on-Chip simulator

Abstract: Abstract-Network-on-Chips (NoCs) are becoming integral parts of modern microprocessors as the number of cores and modules integrated on a single chip continues to increase. Research and development of future NoC technology relies on accurate modeling and simulations to evaluate the performance impact and analyze the cost of novel NoC architectures. In this work, we present BookSim, a cycle-accurate simulator for NoCs. The simulator is designed for simulation flexibility and accurate modeling of network compone… Show more

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Cited by 589 publications
(188 citation statements)
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References 30 publications
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“…We perform full-system simulation using a cycle-accurate x86 simulator, FeS2 [6]; the network is simulated with Booksim [3]. The configuration is listed in Table I.…”
Section: Resultsmentioning
confidence: 99%
“…We perform full-system simulation using a cycle-accurate x86 simulator, FeS2 [6]; the network is simulated with Booksim [3]. The configuration is listed in Table I.…”
Section: Resultsmentioning
confidence: 99%
“…We use a heavily-modified version of the Booksim network simulator to model a local-store architecture similar to STI Cell [62] including processors, memory controllers, and local storage [34]. Initially we simulate writes and synchronous reads operations of single HTAs.…”
Section: Methodsmentioning
confidence: 99%
“…These tools are used either to evaluate the characteristics, functions, power consumption and performances of the NoC design (e.g. [54,60]), or to explore design space of reconfigurable NoCs (e.g. [30,41,62,64]).…”
Section: Simulatorsmentioning
confidence: 99%