A diagonal active-area stacked capacitor DRAM cell with storage capacitor on bit line

Kimura, S.; Kawamoto, Y.; Kure, T.; Hasegawa, Norio; Kisu, T.; Etoh, J.; Aoki, Masakazu; Takeda, Eiji; Sunami, Hideo; Itoh, K.

doi:10.1109/16.47780

Cited by 11 publications

(1 citation statement)

References 10 publications

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“…1, SN in diagonal cell array scheme, where active areas are tilted, can increase the minimum pitch of SN by approximately 50%, compared to conventional SN in straight cell array scheme. 11) Figure 2 shows the schematic diagram of active area, SN contact and SN in straight and diagonal cell array schemes, respectively. The minimum pitch of SN confines to the minimum pitch of the active area in straight cell array scheme, but the minimum pitch of SN can increase by tilting the active area in diagonal cell array scheme.…”

Section: Process Integration Of Robust Cylinder Capacitor With Diagon...mentioning

confidence: 99%

Robust Metal/AHO/HSG-Cylinder Capacitor Technology Using Diagonal Cell Array Scheme and Double Mold Oxide

Kim¹,

Hyun²,

Park³

et al. 2005

Jpn. J. Appl. Phys.

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This paper presents a new technique to fabricate three-dimensional thin polymer structures with different geometries on each side for cell-polymer microstructures. To make complex 3D polymer structures, we manufacture a 3D-micromolding aligner, which can make two molding masters be aligned within 2 µm and allows for applying high pressure to construct thin membranes of less than 20 µm. Using this system, wafer-level fabrication of thin polymer structures with complex 3D geometries is realized successfully. Generally, 3D polymer microstructures are used in microfluidic systems, such as micromixers, valves and pumps. In this study we demonstrate some applications for these 3D structures as versatile cell-based microsensors for understanding structural and functional changes of cells and as hybrid organic-inorganic actuators that can be operated independently without external power sources.

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Section: Process Integration Of Robust Cylinder Capacitor With Diagon...mentioning

confidence: 99%

Robust Metal/AHO/HSG-Cylinder Capacitor Technology Using Diagonal Cell Array Scheme and Double Mold Oxide

Kim¹,

Hyun²,

Park³

et al. 2005

Jpn. J. Appl. Phys.

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High Signal-to-Noise Ratio DRAM Design and Technology

Itoh

2001

VLSI Memory Chip Design

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Oxide-nitride storage dielectrics on smooth and rough polycrystalline silicon layers

Fazan

Ditali

Mathews

et al. 1991

Applied Physics Letters

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We demonstrate that for the same capacitance value, 9.5-nm-thick oxide-nitride storage dielectrics deposited on rough polycrystalline silicon exhibit a lower leakage current and a higher lifetime than 5.9 nm layers on smooth polycrystalline silicon. Leakage current reduction of more than two orders of magnitude and a lifetime increase of more than three orders of magnitude are reported. These improvements are explained by the nitride bulk-limited type of conduction. Our data show that textured storage capacitors have all the properties required for efficient fabrication of 64 megabit dynamic random access memories.

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A diagonal active-area stacked capacitor DRAM cell with storage capacitor on bit line

Cited by 11 publications

References 10 publications

Robust Metal/AHO/HSG-Cylinder Capacitor Technology Using Diagonal Cell Array Scheme and Double Mold Oxide

Robust Metal/AHO/HSG-Cylinder Capacitor Technology Using Diagonal Cell Array Scheme and Double Mold Oxide

High Signal-to-Noise Ratio DRAM Design and Technology

Oxide-nitride storage dielectrics on smooth and rough polycrystalline silicon layers

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