A Differential Quantizer-Based Error Feedback Modulator for Analog-to-Digital Converters

Prakash, A. V. Jos; Mathew, Jimson; Jose, Babita R.

doi:10.1109/tcsii.2017.2666822

Cited by 6 publications

(2 citation statements)

References 14 publications

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“…So, the third order NTF is given by: 1 − z −1 3 . The EFM architecture provides greater stability with time varying inputs [25][26][27]. The EFM architecture is shown in Figure 1.…”

Section: Related Workmentioning

confidence: 99%

A New Noise Shaping Approach for Sigma-Delta Modulators Using Two-Stage Feed-Forward Delays and Hybrid MASH-EFM

et al. 2023

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Sigma-delta modulators use a noise-shaping technique to curtail the noise power in the band of interest during digital-to-analog conversion. Error feedback modulator employs an efficient noise transfer function for time varying inputs than any other sigma-delta modulators. However, the efficiency of the conventional noise transfer function degrades and the quantizer saturation issue provokes when the input signal reaches to full scale. This work proposes a new noise transfer function which is a combination of transfer functions of two-stage Feed-forward delays and a novel Hybrid multi-stage noise shaping-error feedback sigma-delta modulator. The noise transfer function of two-stage Feed-forward delays mitigates the concern of quantizer saturation. The noise transfer function offered by the Hybrid multi-stage noise shaping-error feedback architecture provides sustainable solutions to limit cycles and idle tones. The simulation concludes that the proposed noise-shaping approach obtains comparatively high signal-to-quantization noise ratio than the conventional error feedback modulators. Other performance parameters like spurious-free dynamic range, effective number of bits and signal-to-noise plus distortion ratio are also significantly improved.

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“…So, the third order NTF is given by: 1 − z −1 3 . The EFM architecture provides greater stability with time varying inputs [25][26][27]. The EFM architecture is shown in Figure 1.…”

Section: Related Workmentioning

confidence: 99%

A New Noise Shaping Approach for Sigma-Delta Modulators Using Two-Stage Feed-Forward Delays and Hybrid MASH-EFM

et al. 2023

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“…The comparator is the basic block of ADC. The comparator has the task of detecting a large or small sampled signal relative to the value of each step (Cárdenas-Olaya, et al, 2017, Correia, et al, 2015, de Aguilar, et al, 2016, Khorami and Sharifkhani, 2016, Kiran, et al, 2016, Prakash, et al, 2017, Steensgaard-Madsen, 2016). Many studies have been done to design and manufacture ADC.…”

Section: Introductionmentioning

confidence: 99%

Design an Improved Structure for 10-Bit Pipeline Analog to Digital Converter Based on 0.18µm CMOS Technology

Rezapour

Setoudeh

Tavakoli

2019

Journal of Applied Engineering Sciences

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This paper proposed a novel structure of a 10-bit, 400MS/s pipelined analog to digital convertor using 0.18 µm TSMC technology. In this paper, two stages are used to converter design and a new method is proposed to increase the speed of the pipeline analog to digital convertor. For this purpose, the amplifier is not used at the first stage and the buffer is used for data transfer to the second stage, in the second stage an amplifier circuit with accurate gain of 8 that is open loop with a new structure was used to speed up, also the design is such that the first 4 bits are extracted simultaneously with sampling. On the other hand, in this structure, since in the first stage the information is not amplified and transferred to the second stage, the accuracy of the comparator circuit should be high, therefore a new structure is proposed to design a comparator circuit that can detect unwanted offsets and eliminate them without delay, and thus can detect the smallest differences in input voltage. The proposed analog to digital convertor was designed with a resolution of 10 bits and a speed of 400MS/s, with the total power consumption 74.3mW using power supply of 1.8v.

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A Differentially Quantized Bandpass Error Feedback Modulator for ADCs in Digital Radio

Sebastian

Prakash

Jose

et al. 2018

Circuits Syst Signal Process

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A Differential Quantizer-Based Error Feedback Modulator for Analog-to-Digital Converters

Cited by 6 publications

References 14 publications

A New Noise Shaping Approach for Sigma-Delta Modulators Using Two-Stage Feed-Forward Delays and Hybrid MASH-EFM

A New Noise Shaping Approach for Sigma-Delta Modulators Using Two-Stage Feed-Forward Delays and Hybrid MASH-EFM

Design an Improved Structure for 10-Bit Pipeline Analog to Digital Converter Based on 0.18µm CMOS Technology

A Differentially Quantized Bandpass Error Feedback Modulator for ADCs in Digital Radio

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