2005 IEEE International Symposium on Circuits and Systems
DOI: 10.1109/iscas.2005.1464609
|View full text |Cite
|
Sign up to set email alerts
|

A Digitally Programmable On-Chip RC-Oscillator in 0.25μm CMOS Logic Process

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1

Citation Types

1
10
0

Publication Types

Select...
4
3

Relationship

0
7

Authors

Journals

citations
Cited by 12 publications
(11 citation statements)
references
References 2 publications
1
10
0
Order By: Relevance
“…In [1], the frequency inaccuracy due to temperature alone was over 2%, while in several recent efforts, including [2] and [3], similar results were obtained. In [3], a 7-MHz compensated ring oscillator was reported to achieve 2.6% total frequency inaccuracy over PVT without frequency trimming.…”
supporting
confidence: 73%
“…In [1], the frequency inaccuracy due to temperature alone was over 2%, while in several recent efforts, including [2] and [3], similar results were obtained. In [3], a 7-MHz compensated ring oscillator was reported to achieve 2.6% total frequency inaccuracy over PVT without frequency trimming.…”
supporting
confidence: 73%
“…Table 1. Digitally trimmed resistor array RC oscillator inspired from [5] The simulation model of the previous work by [4] is approximated in T-spice under 0.35µm CMOS process. There is seven resistors array and each resistor switches ON/OFF using seven nmos switches.…”
Section: Programming Methodologymentioning
confidence: 99%
“…The chip area of the simulated model inspired from [5] is estimated. The transistor Effective Area= min poly-silicon width + 2*(min poly to contact spacing) + 2*(min contact size) +2*(min spacing from contact to active area edge).…”
Section: Theoretical Approximation Of Effective Chip Areamentioning
confidence: 99%
See 2 more Smart Citations