ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705)
DOI: 10.1109/esscirc.2003.1257077
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A digitally tuned 1.1 GHz subharmonic injection-locked VCO in 0.18μm CMOS

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Cited by 11 publications
(13 citation statements)
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“…The first issue is that the naturally running frequency of the oscillator must be very close to the desired harmonic of the reference to achieve injection‐locking [9]. In Figure 8 different situations, which occur depending on the injection frequency, are shown.…”
Section: Experimental Results Of the Proposed Ilftmentioning
confidence: 99%
“…The first issue is that the naturally running frequency of the oscillator must be very close to the desired harmonic of the reference to achieve injection‐locking [9]. In Figure 8 different situations, which occur depending on the injection frequency, are shown.…”
Section: Experimental Results Of the Proposed Ilftmentioning
confidence: 99%
“…There has recently been increasing interest in CMOS circuits that leverage injection-locked oscillators, including frequency dividers [1], clock and data recovery circuits [2], and clock multipliers [3]. However, in each of these cases, the injected oscillator is not continuously tuned to the input signal while the injection-locking is taking place.…”
Section: Introductionmentioning
confidence: 99%
“…The lack of tuning presents a potential problem in a practical context, especially for sub-harmonic injection locked oscillators such as [3], where the oscillator is locked to a harmonic of the input signal. In this case, the need to achieve an adequate injection power level such that injection-locking is maintained across thermal variations will potentially undermine the ability to achieve a low power implementation.…”
Section: Introductionmentioning
confidence: 99%
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“…Second, the low phase noise VCO is eliminated as the phase noise will be determined by the clock PLL, which allows a significant reduction in the VCO power consumption [23].…”
Section: Proposed Dco Architecturementioning
confidence: 99%