This paper describes the low-power channel selection switched-capacitor filter for WCDMA applications. Tbe 5t h _order Elliptic lowpass filter consists of the operational amplifiers that incorporate the slew-rate enhancement technique in order to achieve low-power performance for a high sampling clock frequency. The filter is fabricated in a O.3S-J.1m 2P4M CMOS technology and power consumption is 21.36mW for a single supply voltage of 3.0V.
I. INTRODUCTIONThe wireless telecommunication becomes the major trend for data transmission as well as the conventional voice signal. As the demands for larger data transfer have been continuously increased, the wireless communication technology has developed in order to satisj)' the high data-rate requirements higher than Mb/s these days [1,2]. The wireless transceiver system can process the multi-media data with increasing computational capability, which means that more systems should be incorporated in the wireless transceiver system.In addition to developments of communication and digital signal processing technologies, the advent of VLSI technology makes it possible to implement the transceiver system with a SoC (System on-Chip) methodology and thus RF front-end, baseband analog fr ont-end, and digital MODEM can be combined into a single chip [3,4]. This should be one of the most important factors to makes the handheld set for wireless communication to be cost-competitive.Additionally, implementation of the efficient hardware with low power consumption should be achieved for the usual case when the power resources are quite limited.The baseband analog front-end becomes the critical block for detennining the perfonnance of transceiver systems together with the RF front-end block. The filter block is placed between the RFIIF downconversion mixer block and analog-to-digital converter of the baseband analog front-end block. The main operation of the filter block is to filter out the undesired channels. The programmable voltage gain can be provided in addition to the variable-gain amplifier in the receiver path. In some architecture, the DC component of the incoming signal is required to be removed, which can be efficiently included in the filter block [5].