A Drain-Lag Model for AlGaN/GaN Power HEMTs

GaN technology has gained a lot of attention in Europe over the last few years for various domains including RF electronics. After a few years of active observation, United Monolithic Semiconductors (UMS) has taken the decision to introduce a GaN technology family in its portfolio. Based on its extensive experience of III-V technology and the intensive support and collaboration with partners and European research institutes, UMS has developed the capability to produce state-of-the-art GaN devices and circuits. The present paper will summarize the current status achieved and illustrate it with a few representative examples. Aspects covering material, devices, and circuits will be addressed.

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“…Nonlinear models are extracted that take into account traps phenomena [11] and transistor self-heating. Noise models are also under development.…”

Section: C) Modelingmentioning

confidence: 99%

Industrial GaN FET technology

Blanck

Thorpe

Behtash

et al. 2010

Int. j. microw. wirel. technol.

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“…The gate‐lag can be observed by comparing the pulsed I – V with bias condition (a) and (b). By comparing pulsed I–V with bias condition (b) and (c), the drain‐lag can be distinguished because only the drain voltage changed . Pulse width and period are 500 ns and 500 μs, respectively.…”

Section: Resultsmentioning

confidence: 99%

Suppression of current collapse in AlGaN/GaN MISHFET with carbon‐ doped GaN/undoped GaN multi‐layered buffer structure

Kang

Won

Kim

et al. 2015

Physica Status Solidi (a)

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We present a new semi-insulating carbon-doped GaN/undoped GaN multi-layered buffer structure for AlGaN/GaN heterojunction field effect transistors, which drastically suppresses current collapse in GaN MISHFET with improving the oncurrent performance of the device but without degrading the breakdown characteristic. It is believed that spatial compensation between the multi-layered GaN layers not only makes the multi-layered buffer layer very highly resistive, but also prevents the electrons from the 2DEG channel from being captured into deep traps in the buffer layer, which maintains high-high breakdown characteristic and leads to great suppression of current collapse in AlGaN/GaN-based transistors, respectively.

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“…The pulselength is 1 μs and pulse separation is 1 ms to avoid thermal effects on the output current. The pulselength during experiments (1 μs) is fast enough to enhance the visualization of CC since this process is typically large in order of seconds [22].…”

Section: Compact Model Investigationmentioning

confidence: 99%

Analysis of GaN HEMTs Switching Transients Using Compact Model

Faramehr

Igić

2017

IEEE Trans. Electron Devices

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This paper presents a methodology to model GaN power HEMT switching transients. Thus, a compact model to predict devices' pulse switching characteristics and current collapse reliability issue has been developed. Parasitic RC subcircuits and a standard double-pulse switching tester to model intrinsic parasitic effects and to analyze power dissipation of GaN power HEMT are proposed and presented. Switching transient including gatelag and drain-lag is predicted for ideal (without trap) and nonideal (with trap) devices. The results are validated by and compared to 2-D finite-element technology computeraided design simulations. The original aim of this exercise is to develop a fast (near-real-time) model which can predict dynamic behavior of single and multiple power GaN HEMTs used for the switching transients of GaN power devices at circuit level.

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A Drain-Lag Model for AlGaN/GaN Power HEMTs

Cited by 35 publications

References 7 publications

Industrial GaN FET technology

Industrial GaN FET technology

Suppression of current collapse in AlGaN/GaN MISHFET with carbon‐ doped GaN/undoped GaN multi‐layered buffer structure

Analysis of GaN HEMTs Switching Transients Using Compact Model

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