A Fast and Fully Parallel Analog CMOS Solver for Nonlinear PDEs

Malavipathirana, Hasantha; Hariharan, S. I.; Udayanga, Nilan; Mandal, Soumyajit; Madanayake, Arjuna

doi:10.1109/tcsi.2021.3085214

Cited by 6 publications

(5 citation statements)

References 53 publications

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“…As other works have shown, despite generally lower precision, analog computations can be orders of magnitude faster and more power efficient than those on even the best digital computers [17], [18], [30], [37]. This is largely attributable to the parallel architecture of ACs, which allows for multiple computations to be performed concurrently; this feature contrasts with the inherently sequential algorithms executed on digital devices, where parallel computing (i.e.…”

Section: Discussionmentioning

confidence: 96%

“…This is largely attributable to the parallel architecture of ACs, which allows for multiple computations to be performed concurrently; this feature contrasts with the inherently sequential algorithms executed on digital devices, where parallel computing (i.e. running multiple processing units simultaneously) may be of limited benefit in solving multidimensional problems with a large degree of inter-variable coupling [31], [36], [37].…”

Section: Discussionmentioning

confidence: 99%

“…Citation information: DOI 10.1109/ACCESS.2024.3391511 analog computation. Recent works have explored the solution/simulation of nonlinear dynamical systems using integrated analog circuitry, often coupled with digital interfaces for configuration and data sampling purposes [6], [35]- [37]. Results are promising, with special-purpose solvers displaying efficiency metrics far superior to those of modern digital computers, though often at the cost of lower precision [17], [18], [29], [37].…”

Section: B Analog Computersmentioning

confidence: 99%

“…The main condition for linear operation is that all transistors remain in the triode region, which requires proper DC biasing [63]. While the DC level V y is kept at the opamp's common-mode, those of V x and V z must be raised to account for input gate threshold voltages [37]; a positive shift of around 300 mV was found to provide a suitable compromise between multiplier linear range and input/output swing. A level-shifting circuit was designed for this purpose: it comprises two so-called "super source followers", one for each differential branch.…”

Section: B Multipliermentioning

confidence: 99%

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CMOS Analog Simulators of Dynamical Systems

Araújo,

Oliveira,

Guerreiro

et al. 2024

IEEE Access

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Analog computing is based upon using physical processes to solve formal mathematical problems. In the past, it was the predominant instrument of scientific calculations. Now, as the physical limits imposed on digital devices compel research into alternate computing paradigms, a reexamination of the potentialities of analog computing is warranted. This work studies the application of analog CMOS cells toward the simulation of dynamical systems, and, more generally, solving sets of coupled time-dependent ordinary differential equations. Following a brief review of the fundamentals of systems theory and analog computing, the main set of computing elements is introduced, each comprising analog cells designed in a 130 nm process. These are subsequently applied to the realization of practical, special-purpose analog computing modules. Illustrative systems from various fields are selected for simulation. Though by no means comprehensive, these case studies highlight the capabilities of contemporary analog computing, especially in solving nonlinear problems. Circuit simulations show good agreement with solutions obtained from highorder numerical methods, at least over a limited range of system parameters. The article concludes with a brief discussion of broader analog computing applications, offering future prospects toward further exploration of its potentialities and limitations in a wide range of domains.INDEX TERMS Analog computers, differential equations, dynamical systems, integrated circuits.

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Section: Discussionmentioning

confidence: 96%

Section: Discussionmentioning

confidence: 99%

Section: B Analog Computersmentioning

confidence: 99%

Section: B Multipliermentioning

confidence: 99%

See 2 more Smart Citations

CMOS Analog Simulators of Dynamical Systems

Araújo,

Oliveira,

Guerreiro

et al. 2024

IEEE Access

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“…Using this algorithm, the authors were able to demonstrate a four order of magnitude improvement in the die size required for a given computational performance. An alternative approach is presented in [32], where the authors choose to focus solely on non-linear PDEs. This restriction meant that the authors were able design a very simple, parallelizable circuit to find the solution to the PDE at any given point.…”

Section: Analog Computingmentioning

confidence: 99%

Survey of Novel Architectures for Energy Efficient High-Performance Mobile Computing Platforms

O’Connor,

Elfouly,

Alouani

2023

Energies

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There are many real-world applications that require high-performance mobile computing systems for onboard, real-time processing of gathered data due to latency, reliability, security, or other application constraints. Unfortunately, most existing high-performance mobile computing systems require a prohibitively high power consumption in the face of the limited power available from the batteries typically used in these applications. For high-performance mobile computing to be practical, alternative hardware designs are needed to increase the computing performance while minimizing the required power consumption. This article surveys the state-of-the-art in high-efficiency, high-performance onboard mobile computing, focusing on the latest developments. It was found that more research is needed to design high-performance mobile computing systems while minimizing the required power consumption to meet the needs of these applications.

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