A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform

Monson, Joshua S.; Wirthlin, Michael; Hutchings, Brad

doi:10.1155/2012/850487

Cited by 14 publications

(7 citation statements)

References 15 publications

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“…This is very similar to how a specific card would act. It is even possible to implement microprocessors inside the FPGA, which makes them highly flexible systems [21].…”

Section: Portable and Configurable Ground Test System For The A400m Amentioning

confidence: 99%

A Research Study for the Design of a Portable and Configurable Ground Test System for the A400M Aircraft

Larios

Barbancho

Biscarri

et al. 2019

International Journal of Aerospace Engineering

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This paper presents a study of the most suitable ground test equipment for the Airbus A400M aircraft aimed at optimizing a design that combines portability, flexibility, and configurability. The study is based on current trends in the configuration of the different parts that are involved in the process of designing Aircraft Interface Modules (AIMs). Researches have been conducted facing the real problems of data acquisition and control in the assembly, maintenance, and repair processes of aircraft. In this sense, the number of signals used simultaneously in historical tests has been determined to be a parameter that plays an important role in the analysis. This work is within the framework of a project that our working group of the Department of Electronic Technology has carried out together with the company Airbus Defense and Space (Airbus DS). Thus, all the analyses and researches for the different configurations of the test equipment have been validated for the company. Some state-of-the-art systems have been considered in the process of designing the structure of the test system while analyzing the main advantages and drawbacks. Every hardware or software component was identified and justified according to its importance with respect to the use case. A comparison of how every approach meets the requirements was taken into account to define a methodology for designing a portable and configurable ground testing system. Thus, the conclusions of our study are being used by Airbus DS for the design of a prototype for the next generation of AIMs in A400M.

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“…This is very similar to how a specific card would act. It is even possible to implement microprocessors inside the FPGA, which makes them highly flexible systems [21].…”

Section: Portable and Configurable Ground Test System For The A400m Amentioning

confidence: 99%

A Research Study for the Design of a Portable and Configurable Ground Test System for the A400M Aircraft

Larios

Barbancho

Biscarri

et al. 2019

International Journal of Aerospace Engineering

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show abstract

“…Sensitive bits are stated as a percentage of the task size. To mimic real-world tasks, this parameter takes values ranging between 7% [43] to upmost 35% [44] of the task size.…”

Section: A Experimental Setupmentioning

confidence: 99%

Reliability and Makespan Optimization of Hardware Task Graphs in Partially Reconfigurable Platforms

Ramezani

Sedaghat

Naghibzadeh

et al. 2017

IEEE Trans. Aerosp. Electron. Syst.

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Abstract-This paper addresses the problem of reliability and makespan optimization of hardware task graphs in reconfigurable platforms by applying fault tolerance (FT) techniques to the running tasks based on the exploration of the Pareto set of solutions. In the presented solution, in contrast to existing approaches in the literature, task graph scheduling, tasks parallelism, reconfiguration delay, and FT requirements are taken into account altogether. This paper firstly presents a model for hardware task graphs, task prefetch and scheduling, reconfigurable computer and a fault model for reliability. Then, a mathematical model of an integer nonlinear multi-objective optimization problem is presented for improving the FT of hardware task graphs, scheduled in partially reconfigurable platforms. Experimental results show the positive impacts of choosing the FT techniques selected by the proposed solution, which is named Pareto-based. Thus, in comparison to non-fault-tolerant designs or other stateof-the-art FT approaches, without increasing makespan, about 850% Mean Time To Failure (MTTF) improvement is achieved and, without degrading reliability, makespan is improved by 25%. In addition, experiments in fault-varying environments have demonstrated that the presented approach outperforms existing state-of-the-art adaptive FT techniques in terms of both MTTF and makespan.

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“…JTAG) to the tested chip and monitoring its behavior. Here, some supporting equipment is needed (compare [3], [8], [18]). This can be extended for flip-flops and block RAMs in more sophisticated fault injectors.…”

Section: Faults In Fpgasmentioning

confidence: 99%

“…SEUs effects within data flow, flip-flops. Hence, we have to use more expensive redundant systems, doubled microprocessor with comparison [3], [8] or check periodically the correctness of the configured system either by a self-test procedure or checking configuration read backs [3], [14]. Both approaches can be optimized to the implemented application.…”

Section: Testing Schemesmentioning

confidence: 99%

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Tracing Fault Effects in FPGA Systems

Węgrzyn¹,

Sosnowski²

2014

International Journal of Electronics and Telecommunications

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Abstract-The paper presents the extent of fault effects in FPGA based systems and concentrates on transient faults (induced by single event upsets -SEUs) within the configuration memory of FPGA. An original method of detailed analysis of fault effect propagation is presented. It is targeted at microprocessor based FPGA systems using the developed fault injection technique. The fault injection is performed at HDL description level of the microprocessor using special simulators and developed supplementary programs. The proposed methodology is illustrated for soft PicoBlaze microprocessor running 3 programs. The presented results reveal some problems with fault handling at the software level.

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A Fault Injection Analysis of Linux Operating on an FPGA-Embedded Platform

Cited by 14 publications

References 15 publications

A Research Study for the Design of a Portable and Configurable Ground Test System for the A400M Aircraft

A Research Study for the Design of a Portable and Configurable Ground Test System for the A400M Aircraft

Reliability and Makespan Optimization of Hardware Task Graphs in Partially Reconfigurable Platforms

Tracing Fault Effects in FPGA Systems

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