A Fine-Grained Control Flow Integrity Approach Against Runtime Memory Attacks for Embedded Systems

Das, Sanjeev; Zhang, Wei; Liu, Yang

doi:10.1109/tvlsi.2016.2548561

Cited by 50 publications

(26 citation statements)

References 24 publications

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“…In fact, when these techniques are correctly implemented, they prevent or mitigate stack smashing attacks, execution of return-2-x [7] and return-oriented programming (ROP) [8][9][10][11] attack and code injection, respectively. Other techniques such as Flow Control Integrity [12], SmashClean [13] and Timing Channel Protection [14] have also been proven effective.…”

Section: Related Work On Memory Protection Architecturesmentioning

confidence: 99%

SSPFA: effective stack smashing protection for Android OS

Marco-Gisbert

Ripoll

2019

Int. J. Inf. Secur.

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In this paper, we detail why the stack smashing protector (SSP), one of the most effective techniques to mitigate stack buffer overflow attacks, fails to protect the Android operating system and thus causes a false sense of security that affects all Android devices. We detail weaknesses of existing SSP implementations, revealing that current SSP is not secure. We propose SSPFA, the first effective and practical SSP for Android devices. SSPFA provides security against stack buffer overflows without changing the underlying architecture. SSPFA has been implemented and tested on several real devices showing that it is not intrusive, and it is binary-compatible with Android applications. Extensive empirical validation has been carried out over the proposed solution. Keywords Security • Buffer overflow • Stack smashing protector • Mobile devices • Android • Defenses

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Section: Related Work On Memory Protection Architecturesmentioning

confidence: 99%

SSPFA: effective stack smashing protection for Android OS

Marco-Gisbert

Ripoll

2019

Int. J. Inf. Secur.

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“…Lee hardware CRA monitor in an ARM-based SoC to detect ROP and JOP attacks through a system debug interface to trace outcomes [7]. However, these monitor measures [8] can only monitor such attacks, but can't provide effective defense strategies.…”

Section: Related Workmentioning

confidence: 99%

“…AES process 8-bit state in finite field arithmetic on GF(2 8 ) elements. The most common approach for the four steps is using lookup tables initialed by the aimed results.…”

Section: Aes Engine With Composite Field Arithmeticmentioning

confidence: 99%

Embedded System Confidentiality Protection by Cryptographic Engine Implemented with Composite Field Arithmetic

Wang

et al. 2018

MATEC Web Conf.

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Embedded systems are subjecting to various kinds of security threats. Some malicious attacks exploit valid code gadgets to launch destructive actions or to reveal critical details. Some previous memory encryption strategies aiming at this issue suffer from unacceptable performance overhead and resource consumption. This paper proposes a hardware based confidentiality protection method to secure the code and data stored and transferred in embedded systems. This method takes advantage of the I/D-cache structure to reduce the frequency of the cryptographic encryption and decryption processing. We implement the AES engine with composite field arithmetic to reduce the cost of hardware implementation. The proposed architecture is implemented on EP2C70 FPGA chip with OpenRisc 1200 based SoC. The experiment results show that the AES engine is required to work only in the case of I/D-cache miss and the hardware implementation overhead can save 53.24% and 13.39% for the AES engine and SoC respectively.

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“…Classic methods extract control flow paths or signatures of basic blocks in static and write them into binaries or store in a special memory. When one program is being executed, an extra hardware component validates control flow paths to ensure the program run correctly [ 12 , 13 ]. One typical method is SIS (Signatured Instruction Streams).…”

Section: Related Workmentioning

confidence: 99%

An efficient control flow validation method using redundant computing capacity of dual-processor architecture

2018

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Microprocessors in safety-critical system are extremely vulnerable to hacker attacks and circuit crosstalk, as they can modify binaries and lead programs to run along the wrong control flow paths. It is a significant challenge to design a run-time validation method with few hardware modification. In this paper, an efficient control flow validation method named DCM (Dual-Processor Control Flow Validation Method) is proposed basing on dual-processor architecture. Since a burst of memory-access-intensive instructions could block pipeline and cause lots of waiting clocks, the DCM assigns the idle pipeline cycles of the blocked processor to the other processor to validate control flow at run time. An extra lightweight monitor unit in each processor is needed and a special dual-processor communication protocol is also designed to schedule the redundant computing capacity between two processors to do validation tasks better. To further improve the efficiency, we also design a software-based self-validation algorithm to help reduce validation times. The combination of both hardware method and software method can speed up the validation procedure and protect the control flow paths with different emphasis. The cycle-accurate simulator GEM5 is used to simulate two ARMv7-A processors with out-of-order pipeline. Experiment shows the performance overhead of DCM is less than 22% on average across the SPEC 2006 benchmarks.

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A Fine-Grained Control Flow Integrity Approach Against Runtime Memory Attacks for Embedded Systems

Cited by 50 publications

References 24 publications

SSPFA: effective stack smashing protection for Android OS

SSPFA: effective stack smashing protection for Android OS

Embedded System Confidentiality Protection by Cryptographic Engine Implemented with Composite Field Arithmetic

An efficient control flow validation method using redundant computing capacity of dual-processor architecture

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