2020
DOI: 10.1109/ted.2019.2954911
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A First Evaluation of Thick Oxide 3C-SiC MOS Capacitors Reliability

Abstract: Despite the recent advances in 3C-SiC technology, there is a lack of statistical analysis on the reliability of SiO2 layers on 3C-SiC, which is crucial in power MOS device developments. This paper presents a comprehensive study of the medium and long-term time-dependent dielectric breakdown (TDDB) of 65 nm thick SiO2 layers thermally grown on a state-of-the-art 3C-SiC/Si wafer. Fowler-Nordheim (F-N) tunnelling is observed above 7 MV/cm and an effective barrier height of 3.7 eV is obtained, which is highest kno… Show more

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Cited by 10 publications
(7 citation statements)
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“…To extract the dielectric lifetime of all of the samples, t 63% is plotted as a function of the applied electric field displayed in Figure a–d . The normal operating electric field of the SiC MOS device is usually 3 MV/cm, , and the obtained lifetime of the sample of NH-8 min is 8.30 years under this condition (Figure d), which is significantly improved compared with that of the sample of NH-0 min (0.02 years). Furthermore, as shown in Figure e, the lifetime of NH-8 min could reach 34.7 years under 3 MV/cm when we select the t 83.7% as the t BD to calculate.…”
Section: Resultsmentioning
confidence: 99%
“…To extract the dielectric lifetime of all of the samples, t 63% is plotted as a function of the applied electric field displayed in Figure a–d . The normal operating electric field of the SiC MOS device is usually 3 MV/cm, , and the obtained lifetime of the sample of NH-8 min is 8.30 years under this condition (Figure d), which is significantly improved compared with that of the sample of NH-0 min (0.02 years). Furthermore, as shown in Figure e, the lifetime of NH-8 min could reach 34.7 years under 3 MV/cm when we select the t 83.7% as the t BD to calculate.…”
Section: Resultsmentioning
confidence: 99%
“…The freestanding 3C-SiC samples underwent a dry oxidation process in the same furnace at 1200 • C for 10 min in an Ar:O 2 (4 slm: 1 slm) ambient followed by a post oxidation anneal at 1200 • C in an Ar:N 2 O (4 slm: 1 slm) ambient since this process has been proven to be highly reliable for 3C-on Si SiC MOSCAPs [12]. A dataset for thermal oxides on 3C-on Si was not included in this study but can be found in a study carried out by Li et al [12]. Aluminium (Al) contacts were formed on top of the oxide layers using an Al wet etch and a 1 µm thick Al ohmic contact was deposited on the backside using electron beam evaporation.…”
Section: Electrical Resultsmentioning
confidence: 99%
“…Furthermore, 3C-on-Si material was provided by NOVASIC, which had an unintentionally doped (2 × 10 16 cm −3 ) n-type 3C-SiC (100) 10 µm thick epitaxial layer which was grown onaxis on a 4 inch Si (100) substrate. MOS-devices, made with a thermal oxide have recently been reported, demonstrating the high quality of this material [12].…”
Section: Methodsmentioning
confidence: 93%
“…The publication [90] points out that extrinsic errors are also still caused by local high electric field strengths. In another publication [91], three error mechanisms are identified using the Weibull distribution on 3C-SiC MOS capacitors. Two error mechanisms are of extrinsic nature (fabrication).…”
Section: B Reliability and Safetymentioning
confidence: 99%