A first single-photon avalanche diode fabricated in standard SOI CMOS technology with a full characterization of the device

Lee, Myoung-Jae; Sun, Pengfei; Charbon, Edoardo

doi:10.1364/oe.23.013200

Cited by 48 publications

(28 citation statements)

References 17 publications

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“…On the other hand, if optical intensities are low (like in our monolithic link), high-speed communication is feasible by using highly sensitive SPAD based receivers, which are sensitive to the number of photons received per bit, and thereby relies on η. Prior art reported SPADs [25,26] in the same SOI technology. Here, the maximum data rate is limited by the dead-time of the SPAD (depends in turn on bit error rate specifications).…”

Section: Discussion and Design Recommendationsmentioning

confidence: 99%

Monolithic optical link in silicon-on-insulator CMOS technology

et al. 2017

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Abstract:This work presents a monolithic laterally-coupled wide-spectrum (350 nm < λ < 1270 nm) optical link in a silicon-on-insulator CMOS technology. The link consists of a silicon (Si) light-emitting diode (LED) as the optical source and a Si photodiode (PD) as the detector; both realized by vertical abrupt n + p junctions, separated by a shallow trench isolation composed of silicon dioxide. Medium trench isolation around the devices along with the buried oxide layer provides galvanic isolation. Optical coupling in both avalanche-mode and forward-mode operation of the LED are analyzed for various designs and bias conditions. From both DC and pulsed transient measurements, it is further shown that heating in the avalanche-mode LED leads to a slow thermal coupling to the PD with time constants in the ms range. An integrated heat sink in the same technology leads to a ∼ 6 times reduction in the change in PD junction temperature per unit electrical power dissipated in the avalanche-mode LED. The analysis paves way for wide-spectrum optical links integrated in smart power technologies.

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Section: Discussion and Design Recommendationsmentioning

confidence: 99%

Monolithic optical link in silicon-on-insulator CMOS technology

et al. 2017

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“…The design of SPADs and SPAD read out circuits are well-known in CMOS technologies [25][26][27]. Recently, a SPAD designed in the same technology has been reported [29].…”

Section: Optocouplers In Cmos Technologymentioning

confidence: 99%

“…To reduce the unpredictable and hence undesired aferpulsing phenomena in SPADs, the deadtime of the SPADs after each photon counting event has to be increased, which limits the bit rate of the SPADs [26], [29]. For the SPADs that were reported in this technology [29], the bit rate would be limited to about 10 Mbit/s based on their reported deadtime (∼ 100 ns). The major challenge would be improving SPAD designs to have a lower deadtime requirement.…”

Section: Transmission Bit Ratementioning

confidence: 99%

Low power wide spectrum optical transmitter using avalanche mode LEDs in SOI CMOS technology

Agarwal¹,

Dutta²,

Annema³

et al. 2017

Opt. Express

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This paper presents a low power monolithically integrated optical transmitter with avalanche mode light emitting diodes in a 140 nm silicon-on-insulator CMOS technology. Avalanche mode LEDs in silicon exhibit wide-spectrum electroluminescence (400 nm < λ < 850 nm), which has a significant overlap with the responsivity of silicon photodiodes. This enables monolithic CMOS integration of optocouplers, for e.g. smart power applications requiring high data rate communication with a large galvanic isolation. To ensure a certain minimum number of photons per data pulse (or per bit), light emitting diode drivers must be robust against process, operating conditions and temperature variations of the light emitting diode. Combined with the avalanche mode light emitting diode's steep current-voltage curve at relatively high breakdown voltages, this conventionally results in high power consumption and significant heating. The presented transmitter circuit is intrinsically robust against these issues, thereby enabling low power operation.

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“…4. The DCR density could be reduced to hundreds of Hertz per micrometer square at 80K and it is believed to reduce to tens of Hertz per micrometer square [23] if trap-assisted noise from trench etching could be filtered out at extremely low temperatures. However, it needs future work to confirm possible increased afterpulsing below 70K [21,24].…”

Section: Characteristics On Flexible Trench-isolated Spad Integrated mentioning

confidence: 99%

“…The DCR measurement shows a much lower dark noise in the planar SPAD. While the diameter of the multiplication region was designed from 3µm to 6µm, the DCR density varied from 100Hz/µm 2 to 300Hz/µm 2 , which is comparable with DCR density of standard SOI CMOS SPAD [23]. PDP was measured with peak value of 13% at 450nm.…”

Section: Comparison Between Flexible Trench-isolated Spad and Planar mentioning

confidence: 99%

Flexible ultrathin-body single-photon avalanche diode sensors and CMOS integration

Sun¹,

Ishihara²,

Charbon³

2016

Opt. Express

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Abstract:We proposed the world's first flexible ultrathin-body singlephoton avalanche diode (SPAD) as photon counting device providing a suitable solution to advanced implantable bio-compatible chronic medical monitoring, diagnostics and other applications. In this paper, we investigate the Geiger-mode performance of this flexible ultrathin-body SPAD comprehensively and we extend this work to the first flexible SPAD image sensor with in-pixel and off-pixel electronics integrated in CMOS. Experimental results show that dark count rate (DCR) by band-to-band tunneling can be reduced by optimizing multiplication doping. DCR by trap-assisted avalanche, which is believed to be originated from the trench etching process, could be further reduced, resulting in a DCR density of tens to hundreds of Hertz per micrometer square at cryogenic temperature. The influence of the trench etching process onto DCR is also proved by comparison with planar ultrathin-body SPAD structures without trench. Photon detection probability (PDP) can be achieved by wider depletion and drift regions and by carefully optimizing body thickness. PDP in frontside-(FSI) and backside-illumination (BSI) are comparable, thus making this technology suitable for both modes of illumination. Afterpulsing and crosstalk are negligible at 2µs dead time, while it has been proved, for the first time, that a CMOS SPAD pixel of this kind could work in a cryogenic environment. By appropriate choice of substrate, this technology is amenable to implantation for biocompatible photon-counting applications and wherever bended imaging sensors are essential.

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A first single-photon avalanche diode fabricated in standard SOI CMOS technology with a full characterization of the device

Cited by 48 publications

References 17 publications

Monolithic optical link in silicon-on-insulator CMOS technology

Monolithic optical link in silicon-on-insulator CMOS technology

Low power wide spectrum optical transmitter using avalanche mode LEDs in SOI CMOS technology

Flexible ultrathin-body single-photon avalanche diode sensors and CMOS integration

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