A flexible 10-300 MHz receiver IC employing a bandpass sigma-delta ADC

Schreier, Richard; Lloyd, J.; Singer, L.; Weiss, F.G.; Sam, B.; Paterson, Donald; Jacobs, Corinna; Steinheider, J.; Timko, M.; Zhou, Jian; Martin, William J.

doi:10.1109/rfic.2001.935645

Cited by 4 publications

(1 citation statement)

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“…In such cases, the A/D conversion is implemented by a single bandpass ADC with a passband centered at an IF frequency. An example of such a receiver is presented in [43] for the case of a commercial IC that can be configured for a variety of two-way radio applications. In this example, a switched-capacitor fourth-order bandpass modulator with nine-level quantization, mismatch-shaping DAC's, and a user-selectable sample-rate, , between 12 and 24 MHz is used to digitize signals in a passband centered at a second IF of .…”

Section: ) Delta-sigma Adcs In Superheterodyne Receiversmentioning

confidence: 99%

Delta-sigma data conversion in wireless transceivers

Galton

2002

IEEE Trans. Microwave Theory Techn.

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High-performance analog-to-digital converters, digital-to-analog converters, and fractional-frequency synthesizers based on delta-sigma (16) modulation-collectively referred to as 16 data converters-have contributed significantly to the high level of integration seen in recent commercial wireless handset transceivers. This paper presents a tutorial on 16 data converters and their uses and implications with respect to wireless transceiver architectures.

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Section: ) Delta-sigma Adcs In Superheterodyne Receiversmentioning

confidence: 99%