Delta-sigma data conversion in wireless transceivers

Abstract

High-performance analog-to-digital converters, digital-to-analog converters, and fractional-frequency synthesizers based on delta-sigma (16) modulation-collectively referred to as 16 data converters-have contributed significantly to the high level of integration seen in recent commercial wireless handset transceivers. This paper presents a tutorial on 16 data converters and their uses and implications with respect to wireless transceiver architectures.

Data Conversion

“…Given that the input signal has much narrower frequency content than the sampling frequency, the converted digital signal can faithfully, with low quantization noise in the desired band, represent the information content present in the input analog signal. It will be shown that the quantization noise increases as a function of frequency due to the highpass shaping nature of the loop [20]. In order to further illustrate the basic functionality of the DS converter shown in Figure 6.30, let the input signal to the loop filter be comprised of the difference between the input signal x a (t) and its reconstructed approximation y a (t).…”

A 900 MHz CMOS RF transceiver including digital baseband and hardware‐MAC for IEEE 802.15.4/ZigBeeTM applications

“…The goal was to use one PLL for the full band using a fixed crystal frequency, and to have flexibility for future applications with different frequency plans. Therefore, a fractional-N PLL architecture [10] was chosen. Figure 7 shows the block diagram of the PLL.…”

Electronic Implementation of Multirate Sigma-Delta Modulators Using CMOS Technologies

“…Recently, the high operating speed of modern CMOS technologies has extended their range of applications to narrow and wide band transceivers [2][3][4]. A high Signal-to-(Noise+Distortion) Ratio (SNDR) can be achieved using modulators with a high Oversampling Ratio (OSR), or with a high-order Noise Transfer Function (NTF).…”