A flexible gate array architecture for high-speed and high-density applications

Gallia, J.; Landers, R J; Shaw, C.-H.; Blake, T.G.W.; Banzhaf, W.

doi:10.1109/4.494205

Cited by 2 publications

(1 citation statement)

References 8 publications

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“…For MPGAs, logic blocks have traditionally been relatively fine-grained [29] [12][16] [13]. For FPGAs, logic blocks are usually based on look-up-tables (LJJTs) [28] [2][ 191, or multiplexers [ 11.…”

Section: Introductionmentioning

confidence: 99%

An LPGA with foldable PLA-style logic blocks

Anderson

Brown

1998

Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays - FPGA '98

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Laser-programmed gate arrays (LPGAs) represent a new approach to application specific integrated circuit prototyping and implementation. This paper proposes a new LPGA logic block architecture called a fola!able PLA-style logic block The proposed logic block architecture is similar to that found in commercially available CPLDs. The term foldable means that the granularity of the logic block can be varied. This is achieved using the LPGA laser disconnect methodology. A custom %hD tool has been developed to map circuits into the new logic block architecture. An experimental study shows that LPGAs with foldable logic blocks are more area-ejj?cient than those based on normal unfoldable logic blocks.

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Section: Introductionmentioning

confidence: 99%

An LPGA with foldable PLA-style logic blocks

Anderson

Brown

1998

Proceedings of the 1998 ACM/SIGDA Sixth International Symposium on Field Programmable Gate Arrays - FPGA '98

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The design of a low energy FPGA

George

Zhang

Rabaey

1999

Proceedings of the 1999 International Symposium on Low Power Electronics and Design - ISLPED '99

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This work presents the design of an energy efllcient FPGA architecture. Significant reduction in the energy consumption is achieved by tackling both circuit design and architecture optimization issues concurrently. A hybrid interconnect structure incorporating Nearest Neighbor Connections, Symmetric Mesh Architecture, and Hierarchical connectivity is used. The energy of the interconnect is also reduced by employing low-swing circuit techniques. These techniques have been employed to design and fabricate an FPGA. Preliminary analysis show energy improvement of more than an order of magnitude when compared to existing commercial architectures.

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A flexible gate array architecture for high-speed and high-density applications

Cited by 2 publications

References 8 publications

An LPGA with foldable PLA-style logic blocks

An LPGA with foldable PLA-style logic blocks

The design of a low energy FPGA

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