A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation

Abstract

A PUF is a physical security primitive that allows to extract intrinsic digital identifiers from electronic devices. It is a promising candidate to improve security in lightweight devices targeted at IoT applications due to its low cost nature. The Arbiter PUF or APUF has been widely studied in the technical literature. However it often suffers from disadvantages such as poor uniqueness and reliability, particularly when implemented on FPGAs due to physical layout restrictions. To address these problems, a new design known as FF-APUF has been proposed; it offers a compact architecture, combined with good uniqueness and reliability properties, and is well suited to FPGA implementation. Many PUF designs have been shown to be vulnerable to machine learning (ML) based modelling attacks. In this paper, initial tests show that to attack the FF-APUF design requires more effort for the adversary than a conventional APUF design. A comprehensive analysis of the experimental results for the FF-APUF design is presented to show this outcome. An improved APUF design with a balanced routing, and the proposed FF-APUF design are both implemented on an Xilinx Artix-7 FPGA at 28 nm technology. The empirical min-entropy of the FF-APUF design across different devices is shown to be more than twice that of the conventional APUF design.

A Huffman-Based Joint Compression and Encryption Scheme for Secure Data Storage Using Physical Unclonable Functions

“…BR-PUF is a combination of SRAM PUFs [28] and APUF [29]. It not only has millions of excitation space like APUF, but also has a bistable ring structure like SRAM PUFs.…”

Security in Approximate Computing and Approximate Computing for Security: Challenges and Opportunities

“…A PUF is a security primitive which utilizes the inherent process variations present during manufacturing in order to generate a unique digital fingerprint that is intrinsic to the device itself. As this natural variation between silicon dies is out of the manufacturer's control, they are inherently difficult to clone, as well as providing additional tamper-evident properties [46], [47], [48], [49]. PUF architectures can be broadly classified into Weak PUF and Strong PUF (SPUF) as discussed in [50].…”

“…The DRAM memory-based PUF, is only one of a range of types of PUF designs. Other types include circuit based Arbiter PUFs [49] and ring oscillator (RO) PUFs [102]. Moreover, in Section V-C2, an approximate algorithm, PAC, was utilised to attack PUF designs [93].…”

A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory

“…Previous PUF designs have been proposed based on CMOS circuits, such as the tristate inverter based PUF and the flipflop based PUF [4], [5]. However, they cannot meet the needs of IoT devices due to the limited density and scaling trend of CMOS technology; therefore, CMOS-based PUF designs encounter the same constraints, such as high power dissipation and large area.…”