A Floating-Gate-Based Programmable CMOS Reference

Srinivasan, Venkatesh; Serrano, G.; Twigg, C.M.; Hasler, P.

doi:10.1109/tcsi.2008.925351

Cited by 51 publications

(21 citation statements)

References 18 publications

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“…The reference circuit in Figure 7 is based on the bootstrap reference architecture [22]. However, unlike the conventional bootstrap reference architecture where the difference between the aspect ratios of pFETs is responsible for the reference generation, the V REF in Figure 7 is generated because of the difference in the amount of charge stored at the floating-node of the FG pFETs.…”

Section: Fg-based Reference Circuit In Subthreshold Regionmentioning

confidence: 99%

Models and Techniques for Temperature Robust Systems on a Reconfigurable Platform

Shah

Töreyin

Hasler

et al. 2017

JLPEA

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This paper investigates the variability of various circuits and systems over temperature and presents several methods to improve their performance over temperature. The work demonstrates use of large scale reconfigurable System-On-Chip (SOC) for reducing the variability of circuits and systems compiled on a Floating Gate (FG) based Field Programmable Analog Array (FPAA). Temperature dependencies of circuits are modeled using an open-source simulator built in the Scilab/XCOS environment and the results are compared with measurement data obtained from the FPAA. This comparison gives further insight into the temperature dependence of various circuits and signal processing systems and allows us to compensate as well as predict their behavior. Also, the work presents several different current and voltage references that could help in reducing the variability caused due to changes in temperature. These references are standard blocks in the Scilab/Xcos environment that could be easily compiled on the FPAA. An FG based current reference is then used for biasing a 12 × 1 Vector Matrix Multiplication (VMM) circuit and a second order G m − C bandpass filter to demonstrate the compilation and usage of these voltage/current reference in a reconfigurable fabric. The large scale FG FPAA presented here is fabricated in a 350 nm CMOS process.Keywords: circuits and system; temperature dependence; reference generator; FPAA Analog Processing and Temperature DependenceThe number of systems combining elements from within and among the emerging technologies of sensors, communications, and robotics grows every day. The computational abilities of these systems affect the overall system performance through various aspects (e.g., functionality, battery-life, foot-print, etc.). Traditionally most computational tasks have been performed in the digital domain, which can achieve high resolution computation at the cost of high power consumption [1]. For systems with a limited power budget, however, low-power, real-time computation techniques have been sought after. Accordingly, analog-signal-processing has been used extensively as an energy-efficient alternative to digital options [2][3][4].Recent mixed-mode large-scale Field-Programmable Analog Array (FPAA) enables advanced functionality for a wide spectrum of sensor applications [5]. These FPAAs combine the energy-efficiency, reconfigurability, and programmability of floating-gate-based analog signal processing with the precision and compatibility of digital, thereby a variety of analog circuitry implemented on FPAAs serve as building blocks of more complex signal processing functions [5].Many of the systems that can benefit from the computational power of an FPAA need to operate over a range of environments and temperatures. For instance, modern ubiquitous medical health assessment systems use physiologic signals collected from ambulatory subjects during daily outdoor

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Section: Fg-based Reference Circuit In Subthreshold Regionmentioning

confidence: 99%

Models and Techniques for Temperature Robust Systems on a Reconfigurable Platform

Shah

Töreyin

Hasler

et al. 2017

JLPEA

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“…These techniques are typically limited to the order of 1-s timescales. Floating-Gate (FG) devices and circuits (e.g., [25]) have provided long-term memories for analog computation, enabling very precise programming of values (e.g., 14 bit [26]) for long-term lifetimes (e.g., [27,28]). Memory elements on the order of minutes or longer tend to be more challenging, but possible using adaptive FG techniques from ms to years [29,30], at reasonably low power, including in configurable spaces [31].…”

Section: Digital Computationmentioning

confidence: 99%

“…The use of Floating-Gate (FG) devices (e.g., [25]) enables directly programming out these issues, including accounting for a range of temperatures (e.g., [28,47]). Calibration of FG devices, particularly in FPAA devices, has been extensively studied and experimentally shown [61,62].…”

Section: Digital Strength: Lower Cost Numerical Precisionmentioning

confidence: 99%

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

Hasler

2017

JLPEA

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Abstract:The focus of this work is to develop a starting framework for analog numerical analysis and related algorithm questions. Digital computation is enabled by a framework developed over the last 80 years. Having an analog framework enables wider capability while giving the designer tools to make reasonable choices. Analog numerical analysis concerns computation on physical structures utilizing the real-valued representations of that physical system. This work starts the conversation of analog numerical analysis, including exploring the relevancy and need for this framework. A complexity framework based on computational strengths and weaknesses builds from addressing analog and digital numerical precision, as well as addresses analog and digital error propagation due to computation. The complimentary analog and digital computational techniques enable wider computational capabilities.

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“…A recent breakthrough brought forward the concept of voltage reference based on charge difference on floating gate (FG) FETs [6], [7] and the same in a beta multiplier circuit [8]. Though this sub 1V reference introduces a new dimension of field programmability, yet their narrow range of programmability or no programmability, and single output voltage, limits its wide applicability.…”

Section: Iintroductionmentioning

confidence: 99%

“…Though this sub 1V reference introduces a new dimension of field programmability, yet their narrow range of programmability or no programmability, and single output voltage, limits its wide applicability. This paper discusses a different strategy that improves upon the voltage reference design [8]. The design consists of current source subcircuit, based on basic beta multiplier self biasing circuit [9] and uses a pFET resistor instead of ordinary passive resistor.…”

Section: Iintroductionmentioning

confidence: 99%

On-chip tunable wide ranged multiple output voltage reference

Kapur

Markan

Pyara

2012

2012 Proceedings of IEEE Southeastcon

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We presents an on-chip tunable wide ranged multiple output CMOS voltage reference based on non-volatile highly precise field programmable floating gate transistors. The reference is outfit for both sub 1V and above 1V applications. The circuit design consists of basic beta multiplier configuration and offers a strategy of making the current sourcing circuit and reference generating circuit as independent units. A simulation model of the circuit was built in T-Spice, 0.35µm CMOS process. Simulation results show high amount of temperature insensitivity for a large range of thermal conditions. The reference voltage variation is about 1.65mV/°C to 1.67mV/°C over wide temperature range of -40 to 140°C; has an impressive static supply dependency of 125µV/V for a reference of 280mV. The circuit can also be operated at very low supply voltage (0.5v).

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A Floating-Gate-Based Programmable CMOS Reference

Cited by 51 publications

References 18 publications

Models and Techniques for Temperature Robust Systems on a Reconfigurable Platform

Models and Techniques for Temperature Robust Systems on a Reconfigurable Platform

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

On-chip tunable wide ranged multiple output voltage reference

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